Solid-State Image Sensor Floating Diffusion Capacitance

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Solution Overview

Problem

Solid-state image capturing devices face challenges in reducing the capacitance of the floating diffusion layer, which can lead to a decrease in the maximum storage charge amount of the photodiode, affecting the dynamic range and sensitivity.

Innovation Solution

The device incorporates a first-conductivity-type well with a second-conductivity-type diffusion layer having a higher impurity concentration than the first diffusion layer, and a first-conductivity-type diffusion layer with a lower impurity concentration than the well, allowing for increased depletion layer width and reduced capacitance of the floating diffusion layer.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If the width of the depletion layer in the p-n junction is increased to reduce the capacitance of the floating diffusion layer, then the charge detection sensitivity is improved, but the maximum storage charge amount of the photodiode decreases

Engineering Contradiction:
Improvecharge detection sensitivityVSAvoidmaximum storage charge amount
Core Design Contradiction:
Measurement precisionVSQuantity of substance

Solution Approach 1:

The patent applies local quality by creating a p-type impurity layer with locally varied impurity concentration - the concentration is lower in the region adjacent to the photodiode (to maintain wide depletion layer and low capacitance) and higher in other regions (to prevent maximum storage charge amount decrease). This spatial variation in impurity concentration allows simultaneous optimization of both sensitivity and storage capacity

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent changes the impurity concentration parameter of the p-type impurity layer to resolve the contradiction. By adjusting the impurity concentration distribution - specifically making it lower near the photodiode interface - the depletion layer width increases and capacitance decreases, improving sensitivity while the overall charge storage capacity is preserved through controlled concentration gradients

Inventive Principle:
Principle #35Parameter changes

2Measurement precision

If a p−-type impurity layer with low impurity concentration is provided to increase depletion layer width and reduce floating diffusion layer capacitance, then charge detection sensitivity is increased, but the maximum storage charge amount of the photodiode may decrease

Engineering Contradiction:
Improvecharge detection sensitivityVSAvoidmaximum storage charge amount
Core Design Contradiction:
Measurement precisionVSQuantity of substance

Solution Approach 1:

The patent implements local quality by providing the p-type impurity layer with non-uniform impurity concentration distribution. The impurity concentration is specifically lowered in the region adjacent to the photodiode to increase depletion layer width and reduce capacitance, while maintaining higher concentration in other regions to preserve the maximum storage charge amount

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration enhances charge detection sensitivity and prevents a decrease in the maximum storage charge amount, while also reducing manufacturing steps and the number of capacitance.

Implementation Method 1

a first second-conductivity-type diffusion layer that is provided in the first-conductivity-type well and generates carriers upon being irradiated with light

Methodology Applied
Scientific EffectPhotoelectric effect: Photoelectric Effect

Implementation Method 2

the width of a depletion layer in a p-n junction is increased and the capacitance of a floating diffusion layer is reduced

Methodology Applied
Scientific EffectCapacitance: Capacitance

Data Source

PatentUS9899444B2Solid-state image capturing device and manufacturing method for the same
Publication Date: 2018.02.20 SEIKO EPSON CORP
  • US9899444B2 patent drawing
  • US9899444B2 patent drawing
  • US9899444B2 patent drawing

AI summary

A solid-state image capturing device according to the present invention includes: a first-conductivity-type well; a first second-conductivity-type diffusion layer that is provided in the first-conductivity-type well and generates carriers upon being irradiated with light; a second second-conductivity-type diffusion layer that is provided in the first-conductivity-type well and stores carriers that are generated in the first second-conductivity-type diffusion layer and are transmitted thereto; and a first first-conductivity-type diffusion layer provided below the second second-conductivity-type diffusion layer, wherein an impurity concentration of the second second-conductivity-type diffusion layer is higher than an impurity concentration of the first second-conductivity-type diffusion layer, and an impurity concentration of the first first-conductivity-type diffusion layer is lower than an impurity concentration of the first-conductivity-type well.