Stacked Image Sensor Architecture for Fine-Pitch Pixel Reliability
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Solution Overview
Problem
Current image sensors face challenges in achieving high performance and reliability due to the need for miniaturization and integration in applications such as digital cameras, smartphones, and medical devices, where the scaling of semiconductor elements with fine patterns and tight pitch requirements pose difficulties in light reception and signal processing.
Innovation Solution
The image sensor design involves a stacked configuration of semiconductor chips, including a pixel array chip and a logic chip with an ADC, where the pixel array converts light into electrical signals, and the logic chip processes these signals using a global shutter or rolling shutter scheme, with advanced transistor structures and color filters to enhance light reception and noise reduction.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If semiconductor elements are scaled down with fine patterns and tight pitch to achieve miniaturization, then device size is reduced, but manufacturing precision and reliability deteriorate
Solution Approach 1:
The patent divides the image sensor into multiple semiconductor chips (first chip with pixel array, second chip with logic circuit) that are stacked and bonded together. This segmentation allows each chip to be manufactured separately with optimized process parameters, avoiding the need to fabricate all fine-pitch patterns on a single chip, thereby maintaining manufacturing precision while achieving miniaturization through vertical integration.
2Volume of moving object
If semiconductor elements are scaled down with fine patterns and tight pitch to achieve miniaturization, then device size is reduced, but reliability deteriorates
Solution Approach 1:
By segmenting the device into multiple chips bonded together, the patent isolates potential failure points and allows for independent testing and validation of each chip before assembly. This improves overall reliability while maintaining the miniaturized form factor through vertical stacking.
3Adaptability or versatility
If multiple semiconductor chips are stacked and bonded to improve integration, then device functionality is enhanced, but device complexity increases
Solution Approach 1:
The patent segments the image sensor into functionally distinct chips (pixel array chip and logic circuit chip) that are stacked vertically. This segmentation enables enhanced functionality by combining different operational capabilities in each chip while managing complexity through modular design, where each chip can be independently designed, tested, and manufactured.
Solution Approach 2:
The patent transitions from a planar two-dimensional layout to a three-dimensional stacked configuration. By arranging chips vertically in the thickness direction rather than horizontally, the patent achieves higher integration and enhanced functionality without proportionally increasing the footprint area, thereby managing device complexity while improving adaptability.
4Productivity
If pixel array and logic circuit are integrated on the same chip to improve performance, then signal processing efficiency is enhanced, but light reception performance deteriorates
Solution Approach 1:
The patent segments the pixel array and logic circuit onto separate chips (first chip and second chip respectively) that are stacked and bonded together. This segmentation allows the pixel array chip to be optimized for light reception with large photoelectric conversion elements and deep light-receiving regions, while the logic circuit chip handles signal processing. The vertical stacking maintains short signal paths for efficient processing while preserving optimal light reception characteristics.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration improves the integration and performance of the image sensor by enabling efficient light reception, signal processing, and noise reduction, leading to enhanced image quality and reliability in miniaturized devices.
Implementation Method 1
Each of the pixels may include, for example, a photodiode (PD). The photodiode may serve to convert incident light thereto into an electrical signal.
Data Source
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AI summary
The present disclosure relates to an image sensor and a method for manufacturing the same. The image sensor include a substrate (110) including a first surface (110a), a second surface (110b) opposite the first surface, and a plurality of unit pixel regions (PX) in the substrate (110); a pixel defining pattern (120); and a micro lens (180). Each of the plurality of unit pixel regions (PX) include a photoelectric conversion layer (PD). The pixel defining pattern (120) extends through the substrate (110) in a first direction (D1) so as to define each of the unit pixel regions (PX). The micro lens (180) is formed on the second surface of the substrate and corresponds to the unit pixel regions (PX). The pixel defining pattern (120) includes a first conductive layer (121F) and a second conductive layer spaced apart from the first conductive layer (122).