Image Sensor Readout Gate Dielectric for Lower Leakage Noise
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
CMOS image sensors face performance issues due to high gate leakage and reliability concerns caused by low relative permittivity gate dielectric structures, which result in increased noise and reduced overall performance.
Innovation Solution
The implementation of a pixel circuit with a source-follower transistor having a gate dielectric structure comprising a lower dielectric layer stacked with an upper dielectric layer of higher relative permittivity, reducing equivalent oxide thickness and enhancing noise performance while decreasing gate leakage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional gate dielectric structure with low relative permittivity is used, then the device structure is simple, but gate leakage increases and noise performance deteriorates
Solution Approach 1:
The patent applies composite materials by stacking multiple dielectric layers with different relative permittivities. The gate dielectric structure comprises a first dielectric layer with lower relative permittivity and a second dielectric layer with higher relative permittivity. This composite structure reduces equivalent oxide thickness and gate leakage while maintaining structural complexity at a manageable level.
Solution Approach 2:
The patent changes the physical parameters of the gate dielectric structure by varying the relative permittivity values and thicknesses of different dielectric layers. Specifically, the second dielectric layer has a higher relative permittivity and is positioned adjacent to the channel region, optimizing the electric field distribution and reducing gate leakage without requiring excessive structural complexity.
2Reliability
If the equivalent oxide thickness is reduced to improve noise performance, then random telegraph noise decreases, but gate leakage increases
Solution Approach 1:
The patent applies local quality by positioning the second dielectric layer with higher relative permittivity specifically adjacent to the channel region, while the first dielectric layer with lower relative permittivity is positioned away from the channel. This localized arrangement optimizes the electric field distribution where it matters most (near the channel) while maintaining adequate insulation elsewhere, thus reducing noise without significantly increasing gate leakage.
Solution Approach 2:
The composite dielectric structure allows the system to achieve low equivalent oxide thickness (improving noise performance) while the higher permittivity second layer compensates for gate leakage by providing better electric field confinement. The combination of layers with different permittivity values creates a balanced structure that addresses both noise and leakage issues simultaneously.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration improves noise performance and reliability of the image sensor by reducing random telegraph noise and increasing overall performance.
Implementation Method 1
a gate dielectric structure comprising a lower dielectric layer stacked with an upper dielectric structure, wherein a relative permittivity of the upper dielectric structure is greater than a relative permittivity of the lower dielectric layer
Implementation Method 2
The image sensors comprise one or more photodetectors (e.g., photodiodes, phototransistors, photoresistors, etc.) configured to absorb incident radiation and output electrical signals corresponding to the incident radiation
Data Source
AI summary
Various embodiments of the present disclosure are directed towards an image sensor including a first chip stacked with a second chip. The first chip comprises a first substrate and a photodetector disposed in the first substrate. A first transistor is disposed on the first substrate and neighbors the photodetector. A plurality of second transistors is disposed within or on the stacked first and second chips. The plurality of second transistors comprises a first readout transistor having a first readout gate electrode over a first readout gate dielectric structure. The first readout gate dielectric structure comprises a lower dielectric layer stacked with an upper dielectric structure. A relative permittivity of the upper dielectric structure is greater than a relative permittivity of the lower dielectric layer.