Image Sensor Gate Structure for Low-Noise Miniaturized Pixels

The patent applies local quality by creating a local round edge portion with a greater radius of curvature at specific locations within the active region, while other portions maintain smaller radii. This localized geometric modification improves noise characteristics and electrical properties in critical areas without increasing the overall pixel size, thus resolving the contradiction between high integration density and reliable noise performance.

The patent introduces a vertical dimension by forming a gate electrode that extends onto the sidewall of the active region through the local round edge portion. This three-dimensional gate structure increases the effective channel area and improves electrical characteristics without expanding the planar footprint, enabling better noise performance in highly integrated pixels.

The patent resolves this contradiction by extending the gate electrode onto the sidewall of the active region, creating a vertical gate portion that increases the effective channel area in the vertical dimension. This allows improved electrical properties and low-luminance resolution without increasing the planar pixel area, as the additional channel area is achieved through the third dimension rather than lateral expansion.

The local round edge portion with increased radius of curvature enables the gate electrode to smoothly extend onto the sidewall, creating an optimized three-dimensional channel structure. This curved geometry improves electrical properties by enhancing field distribution and increasing effective channel area while maintaining compact pixel dimensions.