3D Stacked Image Sensor Gate Trench Alignment
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Solution Overview
Problem
Current image sensor manufacturing processes face challenges in integrating multiple chips in a three-dimensional stacked structure while maintaining high performance and miniaturization requirements, particularly in forming gate structures with varying vertical positions efficiently.
Innovation Solution
The proposed solution involves forming gate structures with varying vertical positions in a single manufacturing step, utilizing a stacked structure with a first and second semiconductor substrate, where the second substrate includes a gate trench exposing the first gate structure, and forming transistors with specific gate structures and insulating layers to enable efficient contact and signal transfer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If multiple chips are integrated in a three-dimensional stacked structure, then the image sensor achieves miniaturization and high capacity, but the manufacturing complexity increases
Solution Approach 1:
The patent transitions from traditional planar integration to three-dimensional stacked integration, where multiple semiconductor substrates are vertically stacked with insulating layers between them. This dimensional change enables miniaturization by utilizing vertical space while maintaining functional integration through the stacked architecture.
Solution Approach 2:
The image sensor is divided into multiple independent semiconductor substrates (first substrate, second substrate, etc.) that are stacked vertically. Each substrate can be manufactured separately and then bonded together, simplifying the overall manufacturing process by breaking down the complex integration task into manageable segments.
2Manufacturing precision
If gate structures are formed with varying vertical positions in different manufacturing steps, then precise positioning is achieved, but the manufacturing process becomes lengthy and complex
Solution Approach 1:
The patent merges the formation of gate structures at different vertical positions into a single manufacturing step. By establishing a reference plane on one substrate and using it to define the vertical positions of gate structures across multiple substrates simultaneously, the process achieves precise positioning without requiring multiple separate manufacturing cycles.
Solution Approach 2:
A reference plane is established in advance on one of the semiconductor substrates before the gate structures are formed. This preliminary reference structure enables subsequent gate structures at varying vertical positions to be precisely positioned relative to each other in a single manufacturing step, eliminating the need for iterative positioning processes.
3Quantity of substance
If multiple semiconductor substrates are stacked with insulating layers, then integration density increases, but the structural complexity and alignment requirements increase
Solution Approach 1:
The insulating layers serving as bonding interfaces between stacked substrates are designed to perform multiple functions: electrical isolation between substrates, mechanical bonding support, and alignment reference. This multi-functionality reduces the need for additional specialized components and simplifies the overall stacked structure.
Solution Approach 2:
The patent implements localized reference planes and alignment features at specific positions on each semiconductor substrate. By concentrating alignment functionality at these local positions rather than distributing it throughout the entire structure, the patent achieves high integration density while managing structural complexity through targeted, localized quality control.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach simplifies the manufacturing process, reduces product size, and enhances the integration of multiple chips in a three-dimensional stacked structure, improving the performance and miniaturization of image sensors.
Implementation Method 1
Each of the pixels may include, for example, a photodiode (PD). The photodiode may serve to convert incident light into an electrical signal.
Data Source
AI summary
An image sensor is provided, the image sensor comprises a first semiconductor substrate; a photoelectric conversion layer in the first semiconductor substrate; a color filter on a first surface of the first semiconductor substrate; a micro lens covering the color filter; a first transistor on the first semiconductor substrate; a first insulating layer on a second surface; a second semiconductor substrate in contact with the first insulating layer, the second semiconductor substrate including a gate trench exposing at least a portion of the first gate structure; a second transistor on the second semiconductor substrate; a second insulating layer on the fourth surface; and a metal layer in the second insulating layer.