Solid-State Image Sensor Encryption Using Internal Pixel Signals
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Solution Overview
Problem
Existing solid-state imaging devices face security risks due to the potential leakage of specific information used for encryption, as the encryption process often involves external blocks that can expose sensitive imaging element information.
Innovation Solution
A solid-state imaging device is designed with an integrated encryption processor that generates encrypted data using specific signals from imaging pixels, ensuring that the specific information remains internal and secure by utilizing a sensor die and a logic die with connecting conductors within the device.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If encryption is performed using specific information from imaging elements in external blocks, then encryption functionality is achieved, but security is compromised due to potential leakage of specific information
Solution Approach 1:
The patent merges the encryption processor with the imaging device by integrating it onto the same sensor die or closely coupled logic die. This combination ensures that specific information from imaging pixels is processed internally without being exposed to external blocks, thereby maintaining encryption security while managing integration complexity through shared substrate and interconnected wiring layers.
Solution Approach 2:
The encryption processor is nested within the imaging device structure, with the logic die containing the encryption processor mounted adjacent to the sensor die. The specific information flows through connecting conductors from imaging pixels through the logic die's internal wiring layers, creating a nested architecture where the encryption functionality is embedded within the overall imaging device hierarchy, protecting sensitive data from external exposure.
2Reliability
If specific information is kept internal to the device, then security is improved, but device complexity increases due to integrated encryption processor and connecting conductors
Solution Approach 1:
The device is segmented into distinct functional blocks: a sensor die containing imaging pixels and a logic die containing the encryption processor. These segments are mounted adjacent to each other with controlled interconnections through connecting conductors. This segmentation allows specific information to remain internal to the device while organizing complexity into manageable, functionally-separated modules that can be independently designed and tested.
Solution Approach 2:
Connecting conductors serve as intermediaries between the sensor die and logic die, transmitting specific information from imaging pixels to the encryption processor through controlled pathways. These conductors are embedded within the wiring layers of each die and provide secure, internal routing that prevents exposure of sensitive data while managing the complexity of inter-die communication through standardized connection interfaces.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enables a high-security encryption process by securely generating and processing specific information internally, preventing its leakage and ensuring the encrypted data remains secure.
Implementation Method 1
each configured with a photodiode serving as a photoelectric conversion unit
Data Source
AI summary
A solid-state imaging device adapted to encrypt data is described. The solid-state imaging device may include a sensor die comprising an array of imaging pixels formed on a first side of the sensor die and first wiring layers formed on a second side of the sensor die, wherein at least one of the imaging pixels is configured to generate specific signals; a logic die comprising second wiring layers formed on a first side of the logic die; and an encryption processor on the logic die configured to generate encrypted data using the specific signals. The first side of the logic die may be mounted adjacent to the second side of the sensor die and the first wiring layers electrically connect to the second wiring layers, wherein the at least one of the imaging pixels, the encryption processor, and a connecting conductor in which the specific signals pass through from the at least one of the imaging pixels to the encryption processor are located interior to the solid-state imaging device.