Back-Illuminated Image Sensor Module with Heat Dissipating Means
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Solution Overview
Problem
Existing semiconductor image sensor modules face challenges in high-speed image processing due to parasitic resistance and capacity issues, heat dissipation, and light shielding, particularly when using System in Package (SIP) technology and flip-chip bonding methods, which hinder close mounting of semiconductor image sensor chips and image signal processing chips.
Innovation Solution
A semiconductor image sensor module design that laminates semiconductor image sensor chips and image signal processing chips through a heat dissipating means with bump electrodes, using a conductive material with openings surrounded by insulating materials, which reduces parasitic resistance and capacity, and serves as a light shield, allowing efficient heat dissipation and high-speed processing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If contact terminals (lead frames) are used to electrically connect the semiconductor image sensor chip and image signal processing IC, then electrical connection is achieved, but parasitic resistance and capacity increase which interferes with high-speed image processing
Solution Approach 1:
The patent extracts and eliminates the lead frame contact terminals from the electrical connection path between the image sensor chip and processing IC. By using direct chip-to-chip bonding with bump electrodes, the parasitic elements inherent in lead frames are removed, enabling high-speed signal processing.
2Reliability
If the semiconductor image sensor chip and image signal processing IC are contained in packages, then protection and mounting are achieved, but the module size becomes large
Solution Approach 1:
The patent merges the image sensor chip and processing IC into a single integrated module using direct chip bonding. This consolidation eliminates the need for separate packages and interconnections, significantly reducing the overall module size while maintaining chip protection through the bonding structure itself.
Solution Approach 2:
The patent transitions from a planar packaging arrangement to a three-dimensional stacked configuration where chips are bonded face-to-face. This vertical integration reduces the horizontal footprint and overall module volume while maintaining functional integrity.
3Volume of moving object
If the image signal processing chip is mounted close to the semiconductor image sensor chip, then module size is reduced, but heat from the processing chip causes dark current and white noise in the sensor chip
Solution Approach 1:
The patent introduces a heat dissipation structure as an intermediary between the image sensor chip and processing IC. This mediator conducts heat away from the sensor chip while allowing the chips to remain in close proximity for compact integration, thus reducing thermal-induced dark current and noise.
4Device complexity
If the electrode pad and light-receiving surface are formed on the same surface of the front-illuminated type semiconductor image sensor, then chip structure is simplified, but light shielding becomes difficult when chips are laminated
Solution Approach 1:
The patent inverts the conventional front-illuminated structure to a back-illuminated structure. By forming the light-receiving surface on the rear surface of the sensor chip rather than the front, the electrode pads can be positioned on the front surface without interfering with light reception, and light shielding becomes inherently easier in the laminated configuration.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables high-speed signal processing with a minimized module size, reduces dark current and white noise, and effectively shields the image signal processing chip from light, achieving efficient heat dissipation and minimizing parasitic components.
Implementation Method 1
heat dissipating means positioned between the semiconductor image sensor chip and image signal processing chip
Implementation Method 2
thin plate-like heat sink 112 as heat dissipating means
Implementation Method 3
the plurality of bump electrodes of the semiconductor image sensor chip and the plurality of bump electrodes on the image signal processing chip are electrically connected
Implementation Method 4
it has been difficult to shield the image signal processing chip from light
Data Source
AI summary
A semiconductor image sensor module 1 at least includes a semiconductor image sensor chip 2 having a transistor forming region on a first main surface of a semiconductor substrate and having a photoelectric conversion region with a light incident surface formed on a second main surface on the side opposite to the first main surface and an image signal processing chip 3 for processing image signals formed in the semiconductor image sensor chip 2, wherein a plurality of bump electrodes 15a are formed on a first main surface, a plurality of bump electrodes 15b are formed on the image signal processing chip 3, both the chips 2 and 3 are formed to be laminated through heat dissipating means 4 and the plurality of bump electrodes 15a of the semiconductor image sensor chip 2 and the plurality of bump electrodes 15b on the image signal processing chip 3 are electrically connected.