Image Sensor Output Transistor Fixed Gate Potential
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Solution Overview
Problem
Conventional image sensors with shared pixel architecture face challenges in miniaturization due to wiring requirements that reduce the photodiode area, leading to decreased fill factor and image quality.
Innovation Solution
The implementation of a global shutter image sensor with a novel pixel circuitry design where the output transistor's gate is tied to a fixed voltage potential, reducing the need for additional wiring and allowing simultaneous charge transfer across all pixels, thereby increasing the fill factor and image quality.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If conventional shared pixel architecture with multiple transistors per pixel is used, then pixel functionality and image charge transfer capability are improved, but wiring complexity increases and photodiode area decreases
Solution Approach 1:
The patent extracts the gate control function from the output transistor and moves it to a shared control line outside the pixel. This removes the gate wiring from within the pixel boundary, thereby increasing the photodiode area while preserving the transistor's charge transfer functionality.
Solution Approach 2:
The patent implements a shared control line that serves multiple pixels simultaneously. This single control line replaces what would otherwise be individual gate wires for each pixel, reducing overall wiring complexity and freeing up space within each pixel for larger photodiodes.
2Ease of operation
If more wiring is added within each pixel to control transistor functionality, then pixel operation control is improved, but fill factor decreases
Solution Approach 1:
The gate control wiring is extracted from the pixel interior and placed in the inter-pixel routing layer. This maintains full transistor control capability while eliminating the space-consuming gate wires from within the pixel footprint, thereby increasing the fill factor.
3Area of stationary object
If pixel size is reduced for miniaturization, then sensor size is decreased, but wiring density increases and photodiode area is compromised
Solution Approach 1:
The patent moves the gate control routing to a different spatial dimension - specifically to metal layers above or below the pixel circuit layer. This vertical separation allows smaller pixel dimensions without increasing wiring density within the pixel plane, as the control signals are routed through the third dimension.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design enhances the miniaturization of image sensors while maintaining high image quality by reducing the number of wires needed within the pixel, improving sensitivity and efficiency in image capture.
Implementation Method 1
Each pixel circuitry 105 includes a photodiode region ('PD')... accumulation of image charge within photodiode region PD
Implementation Method 2
transfer the image charge to a floating diffusion region ('FD')... output transistor with a gate tied to a fixed voltage potential
Data Source
AI summary
An image sensor pixel includes a photosensitive region and pixel circuitry. The photosensitive region accumulates an image charge in response to light incident upon the image sensor. The pixel circuitry includes a transfer-storage transistor, a charge-storage area, an output transistor, and a floating diffusion region. The transfer-storage transistor is coupled between the photosensitive region and the charge-storage area. The output transistor has a channel coupled between the charge-storage area and the floating diffusion region and has a gate tied to a fixed voltage potential. The transfer-storage transistor causes the image charge to transfer from the photosensitive region to the charge-storage area and to transfer from the charge-storage area to the floating diffusion region.