Image Sensor Parallel Read Line Architecture for Signal Processing Speed
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Solution Overview
Problem
Recent advancements in image sensing devices have increased the number of pixels and frame rate, leading to a greater demand for faster output of digital values for each pixel, which existing technologies struggle to meet efficiently.
Innovation Solution
The image sensing device employs a configuration with two vertical read lines and transfer switches to perform parallel reset and conversion processes, allowing for the simultaneous output of pixel and dark level signals as digital values, thereby reducing the time required to read pixel information.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the number of pixels or frame rate is increased, then the image sensing device can capture more detailed images or higher frame rate videos, but the time allowed for outputting the digital value for one pixel is significantly reduced
Solution Approach 1:
The pixel array is divided into multiple groups, with each group having its own dedicated vertical read line and transfer switch. This segmentation allows parallel processing of pixel data from different groups, reducing the time required to output digital values for each pixel while maintaining high pixel counts and frame rates.
Solution Approach 2:
The patent introduces a vertical read line dimension to the signal routing architecture. By adding vertical read lines and transfer switches, the system creates a two-dimensional routing structure (horizontal and vertical) that enables parallel data transfer paths, thereby reducing the time constraint for digital value output without sacrificing productivity.
2Loss of time
If parallel reset and conversion processes are performed, then the time required to read pixel information is reduced, but the device complexity increases due to additional transfer switches and read lines
Solution Approach 1:
The transfer switches and vertical read lines serve multiple functions: they enable parallel reset operations, facilitate dark level signal transfer, and support pixel signal reading. This multi-functionality reduces the need for separate dedicated circuits for each operation, thereby reducing overall device complexity while achieving time reduction through parallel processing.
Solution Approach 2:
The patent merges the reset operation and conversion process into a parallel execution framework using shared vertical read lines and transfer switches. By combining these operations into a unified parallel architecture, the system reduces total processing time without proportionally increasing device complexity, as the same infrastructure serves multiple operational purposes.
Data Source
AI summary
To solve the problem of conventional image sensing devices that require much time for reading pixel signals, an image sensing device according to an embodiment includes a first pixel unit coupled to a first vertical read line, a second pixel unit coupled to a second vertical read line and placed in the column of the first pixel unit, a first transfer switch provided at an end of the first read line, and a second transfer switch provided at an end of the second read line. When the first transfer switch is controlled to be closed and the second transfer switch is controlled to be conductive, the image sensing device performs a reset process of the vertical read line by a dark level signal output from the second pixel unit, and a conversion process of the dark level read from the first pixel unit, and the pixel signal into digital values.