Image Sensor Photodiode Charge Storage via Vertical N-Type Region
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Solution Overview
Problem
Monolithic image sensors face limitations in charge storage capacity, leading to reduced image quality due to photodiode saturation, as the sensitivity and quality are determined by the charge holding capacity, and increasing the volume of the N-type region is challenging without increasing the pixel size or distance between the N-type region and the gate electrode, affecting charge transfer efficiency.
Innovation Solution
The image sensor design includes a charge collection region with a lightly doped N-type region bounded by P-type regions and an overlying P-type layer, with an insulated gate electrode positioned to convey charges through the P-type layer, allowing for a deeper and narrower N-type region, which enhances charge storage and transfer efficiency without increasing the pixel size, and includes a source follower transistor isolated by shallow trench isolation for efficient readout.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the volume of the N-type region is increased to improve charge storage capacity, then the charge holding capacity is improved, but the pixel size increases
Solution Approach 1:
The patent transitions from a wide, shallow N-type region to a narrow, deep N-type region by increasing the depth dimension. The charge collection region extends vertically to a depth of 0.5-2 μm while maintaining a narrow width of 0.05-0.4 μm, allowing increased charge storage volume without expanding the lateral pixel footprint.
2Quantity of substance
If the distance between the N-type region and the gate electrode is increased to accommodate a deeper N-type region, then the charge storage capacity is improved, but the charge transfer efficiency deteriorates
Solution Approach 1:
The patent introduces a P-type layer as an intermediary medium between the deep N-type charge collection region and the gate electrode. This P-type layer with doping concentration of 10^16 to 10^18 at./cm³ and thickness of 20-150 nm facilitates charge transfer through its controlled electrical properties, enabling efficient charge extraction from deep regions without requiring the gate electrode to be positioned far away.
3Quantity of substance
If a deeper and narrower N-type region is formed to increase charge storage, then the charge holding capacity is improved, but the manufacturing precision requirements increase
Solution Approach 1:
The patent specifies precise parameter ranges for the charge collection region: depth of 0.5-2 μm, width of 0.05-0.4 μm, and N-type doping concentration of 10^15 to 5×10^17 at./cm³. By defining these parameter windows, the invention balances the need for deep narrow geometry with manufacturability, allowing standard semiconductor fabrication processes to achieve the required dimensions and doping levels.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design effectively increases the volume of the N-type region, enabling improved charge storage and transfer efficiency, thereby enhancing image quality without increasing the overall size of the image sensor, while also reducing dark current and ensuring efficient charge evacuation.
Implementation Method 1
an insulated gate electrode positioned over the P-type layer and arranged to receive a gate voltage for conveying charges stored in the charge collection region through the P-type layer
Implementation Method 2
A charge accumulated by the photodiode during an integration period can be transferred to the sensing node
Data Source
AI summary
An image sensor including a plurality of pixels each including a charge collection region including an N-type region bounded by P-type regions and having an overlying P-type layer; and an insulated gate electrode positioned over the P-type layer and arranged to receive a gate voltage for conveying charges stored in the charge collection region through the P-type layer.


