Image Sensor Pixel Array Segmentation for Parallel ADC Processing
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Solution Overview
Problem
Image sensors with shared pixel arrays face reduced operating speed due to the structural feature of shared floating diffusion areas, which limits the utilization of analog-to-digital converters and affects processing efficiency.
Innovation Solution
The implementation of an active pixel sensor array with correlated double sampling circuits and multiplexing circuits that allow simultaneous processing of sense voltages from multiple pixel units connected to different column lines, enabling parallel conversion of signals and improving operating speed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If a shared type of pixel array with multiple transmission transistors sharing the same floating diffusion area is used, then the image sensor can be miniaturized and production cost is reduced, but the operating speed of the image sensor decreases due to limited ADC utilization
Solution Approach 1:
The pixel array is divided into multiple independently operable blocks, where each block has its own floating diffusion area and can be processed by a separate ADC. This segmentation allows parallel processing of multiple pixel blocks simultaneously, increasing the overall operating speed while maintaining the miniaturized shared architecture.
2Device complexity
If one analog digital converter processes sense voltage from pixels connected to one column in a shared pixel array, then device complexity is reduced, but the operating speed decreases due to sequential processing limitations
Solution Approach 1:
Each ADC is designed to be multi-functional, capable of processing sense voltages from multiple different pixel blocks through selective connection via row and column decoders. This allows a single ADC to serve multiple blocks sequentially or in parallel configurations, increasing processing efficiency without proportionally increasing the number of converters.
Solution Approach 2:
The system enables continuous processing by allowing ADCs to immediately begin converting sense voltages from the next pixel block as soon as one block is completed, eliminating idle time. The row and column decoders continuously route available sense voltages to available ADCs, ensuring no processor or sensor element remains idle.
Data Source
AI summary
Disclosed is an image sensor. The image sensor includes an active pixel sensor array including first to fourth pixel units sequentially arranged in a column direction, and each of the first to fourth pixel units is composed of a plurality of pixels. A first pixel group including the first and second pixel units is connected to a first column line, and a second pixel group including the third pixel unit and the fourth pixel unit is connected to a second column line. The image sensor includes a correlated double sampling circuit including first and second correlated double samplers and configured to convert a first sense voltage sensed from a selected pixel of the first pixel group and a second sense voltage sensed from a selected pixel of the second pixel group into a first correlated double sampling signal and a second correlated double sampling signal, respectively.