Image Sensor Pixel Isolation Layout for Higher Integration Density
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Solution Overview
Problem
Current image sensors face limitations in design flexibility and integration density due to the restrictive dimensions and processes involved in forming device isolation patterns and impurity regions, which affect the performance and fabrication of the sensor.
Innovation Solution
The introduction of an auxiliary isolation pattern with a smaller width, formed through separate processes, replaces a portion of the device isolation patterns, allowing for increased design freedom and integration density by being formed after the impurity injection process, thereby enhancing the image sensor's performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If device isolation patterns are formed with traditional dimensions and processes, then manufacturing precision is maintained, but integration density and design flexibility are limited
Solution Approach 1:
The device isolation pattern is divided into two separate components: a first device isolation pattern formed in the substrate, and a second device isolation pattern formed afterward. This segmentation allows each component to be optimized independently, increasing integration density while managing process complexity through staged fabrication
Solution Approach 2:
The first device isolation pattern is formed in advance during substrate preparation, before the main device fabrication process. This preliminary action establishes the isolation structure early, enabling subsequent steps to proceed with greater design freedom and higher integration density
2Adaptability or versatility
If device isolation patterns use fixed dimensions, then manufacturing precision is ensured, but design flexibility is reduced
Solution Approach 1:
Different regions of the device isolation pattern use different structures: the first device isolation pattern uses substrate-level isolation for areas requiring design flexibility, while the second device isolation pattern uses surface-level isolation for areas requiring precise dimensional control. This local differentiation resolves the contradiction between flexibility and precision
3Ease of manufacture
If impurity regions are formed before device isolation patterns, then manufacturing process is simplified, but design freedom is restricted
Solution Approach 1:
The first device isolation pattern is formed as a preliminary structure before impurity region formation. This allows the impurity regions to be defined relative to the isolation pattern, providing design freedom while maintaining fabrication simplicity through the staged process
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach increases the integration density and design flexibility of the image sensor, improving its performance by reducing the restrictive dimensions and processes associated with traditional device isolation patterns.
Implementation Method 1
Each of the unit pixel regions includes a photodiode, which is used to convert an incident light to an electric signal
Data Source
AI summary
An image sensor includes a substrate having a first surface and a second surface, which are opposite to each other, the substrate including a unit pixel region including a device isolation pattern adjacent to the first surface and a photoelectric conversion region adjacent to the second surface, a pixel isolation pattern provided in the substrate to define the unit pixel regions, an impurity region in the unit pixel region and being adjacent to a side surface of the device isolation pattern, a gate electrode provided on the first surface, and an auxiliary isolation pattern provided between a first side surface of the gate electrode and the impurity region, when the image sensor is viewed in a plan view. A bottom surface of the auxiliary isolation pattern may be located at a level different from a bottom surface of the device isolation pattern.