Image Sensor Pixel Array Layout Using STI and DTI Isolation

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Solution Overview

Problem

Image sensors face noise issues in output signals due to various reasons, affecting their performance, especially with the increasing demand for high-quality images in devices like smartphones and digital cameras, and the need for image sensors with different characteristics based on manufacturing purposes.

Innovation Solution

The method involves forming a pixel array layout for image sensors using shallow trench isolation (STI) between deep trench isolation (DTI) areas and p-well regions, with a floating diffusion in contact with STI, and a gate of transfer transistors formed using a trench process, allowing for different pixel array layouts based on desired signal-to-noise ratio (SNR) and manufacturing requirements.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Object-affected harmful factors

If deep trench isolation (DTI) is used to isolate pixels, then noise reduction is improved, but manufacturing complexity increases due to multiple materials and processes

Engineering Contradiction:
ImprovenoiseVSAvoidmanufacturing process complexity
Core Design Contradiction:
Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The isolation structure is segmented into two distinct parts: deep trench isolation (DTI) for primary pixel isolation and shallow trench isolation (STI) for secondary isolation and transistor separation. This segmentation allows each isolation type to perform its specific function optimally while simplifying the overall manufacturing process by dividing the complex isolation task into manageable stages.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different isolation structures are applied to different locations within the pixel array. DTI is used where deep isolation is needed between pixels, while STI is used for shallower isolation requirements such as transistor separation and floating diffusion isolation. This localized application of different isolation qualities optimizes noise reduction where needed while reducing manufacturing complexity in other areas.

Inventive Principle:
Principle #3Local quality

2Measurement precision

If multiple isolation structures are implemented, then signal-to-noise ratio is improved, but pixel area increases

Engineering Contradiction:
Improvesignal-to-noise ratioVSAvoidpixel area
Core Design Contradiction:
Measurement precisionVSArea of moving object

Solution Approach 1:

The isolation structures utilize the vertical dimension effectively with DTI extending deeper into the substrate than STI. This dimensional differentiation allows both isolation structures to coexist in the same horizontal pixel area without excessive overlap, maintaining high signal-to-noise ratio while controlling pixel area by exploiting the third dimension for isolation functionality.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Object-affected harmful factors

If shallow trench isolation (STI) is added between DTI and p-well regions, then noise reduction is improved, but manufacturing steps increase

Engineering Contradiction:
ImprovenoiseVSAvoidmanufacturing efficiency
Core Design Contradiction:
Object-affected harmful factorsVSProductivity

Solution Approach 1:

The STI formation process is merged with the existing DTI manufacturing sequence by utilizing the same trench formation and filling processes at different stages. The STI trenches are formed after DTI completion, and both structures use similar materials and processing techniques, allowing the additional isolation functionality to be integrated into the existing manufacturing flow with minimal additional steps.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS9420209B2Method of generating pixel array layout for image sensor and layout generating system using the method
Publication Date: 2016.08.16 SAMSUNG ELECTRONICS CO LTD
  • US9420209B2 patent drawing
  • US9420209B2 patent drawing
  • US9420209B2 patent drawing

AI summary

A method of generating a pixel array layout for an image sensor (wherein the image sensor includes a plurality of unit pixels, and each of the plurality of unit pixels includes a plurality of transistors) includes forming each unit pixel to include a shallow trench isolation (STI). The STI is between a deep trench isolation (DTI) area and one of a p-well region and source and drain regions of each transistor. The p-well region is below a gate of each of the transistors, and the DTI area is filled with at least two materials.