Image Sensor Power Supply Wiring Layout Optimization
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Solution Overview
Problem
As the resolution of image sensors increases, the area occupied by pixel arrays grows, leading to a decrease in the area for control circuits and power supply wirings, which results in increased electrical resistance and degraded electrical characteristics due to reduced wiring size.
Innovation Solution
The power supply wirings are disposed not only in the fourth region but also in the second region, reducing electrical resistance and IR drop, and the image sensor's peripheral region area is minimized by optimizing the layout and structure of wiring structures across different regions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the area occupied by pixel arrays is increased to improve resolution, then the measurement precision is improved, but the area for control circuits and power supply wirings decreases, resulting in increased electrical resistance and degraded electrical characteristics
Solution Approach 1:
The patent extends the wiring structure from a single-plane layout to a three-dimensional multi-layer configuration. Power supply wirings are distributed across second, third, and fourth wiring structures at different levels, transforming a two-dimensional area constraint into a three-dimensional spatial solution that reduces electrical resistance without consuming additional substrate area.
Solution Approach 2:
The wiring system is segmented into multiple independent wiring structures (second, third, and fourth wiring structures) that can be independently optimized. Each wiring structure serves specific functional regions, allowing the patent to minimize the peripheral region area while maintaining adequate power supply distribution across the pixel array.
2Area of stationary object
If the area for power supply wirings is decreased to minimize peripheral region area, then the area of peripheral regions is reduced, but the electrical resistance increases and electrical characteristics degrade
Solution Approach 1:
The patent resolves this contradiction by transitioning from a single-plane wiring layout to a multi-layer three-dimensional wiring architecture. Power supply wirings are distributed across second, third, and fourth wiring structures at different levels, transforming a two-dimensional area constraint into a three-dimensional spatial solution that reduces electrical resistance without consuming additional substrate area.
Solution Approach 2:
Multiple wiring structures (second, third, and fourth wiring structures) are merged into an integrated power supply distribution system. This consolidation allows the patent to achieve adequate power supply coverage with minimized peripheral region area by efficiently utilizing the vertical stacking of wiring layers.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration improves the electrical characteristics of the image sensor by decreasing the electrical resistance and IR drop in power supply wirings, while reducing the area of the peripheral regions, thus enhancing overall performance.
Implementation Method 1
An image sensor is a semiconductor device which receives an incident light, and converts the incident light into an electric signal
Data Source
AI summary
An image sensor includes a first substrate, a photodiode array, a first wiring structure, a second wiring structure, a third wiring structure and a light blocking layer pattern. The photodiode array is disposed in the first substrate. The photodiode array includes first photodiodes in a first region, second photodiodes in a second region and third photodiodes in a third region. The first wiring structure is disposed in the first region. The first wiring structure is electrically connected to the first photodiodes. The second wiring structure is disposed in the second region. The second wiring structure includes power supply wiring. The third wiring structure is disposed in the third region. The third wiring structure is electrically connected to the third photodiodes. The light blocking layer pattern is disposed on the first substrate. The light blocking layer pattern covers the third region and the fourth region.