Image Sensor Processing Circuit Reducing Transistor Count and Signal Distortion
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Solution Overview
Problem
Conventional image sensor devices require multiple transistor circuits and are prone to signal distortion due to light illumination when storing reset and sampled pixel signals, leading to higher circuit costs and inefficiencies, especially during global shutter operations.
Innovation Solution
The image sensor apparatus incorporates a pixel array with a processing circuit that includes a bias transistor, floating diffusion nodes, switch units, and capacitors, allowing for selective coupling of signal and reset transfer capacitors to reduce the need for separate circuit paths and minimize light-induced signal distortion, enabling operation in both global and rolling shutter modes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If two separate circuit paths are used to store reset charge and sensed pixel signal in pixel cell units, then signal storage is achieved, but circuit complexity and transistor count increase
Solution Approach 1:
The patent merges the storage function for both reset charge and sensed pixel signal into a single shared pixel cell unit with common circuit paths. The pixel cell unit processes and temporarily holds both signal types using shared transistors and capacitors, eliminating the need for completely separate circuit paths while maintaining the ability to store both charge types.
Solution Approach 2:
The pixel cell unit is designed with multi-functional circuit elements that can handle different signal types. The same pixel cell unit and its associated circuitry can process reset charges during reset phase and sensed pixel signals during readout phase, making the circuit universal rather than dedicated to single functions.
2Reliability
If reset charge and sensed pixel signal are temporarily stored in illuminated pixel cell units, then signal storage is enabled, but signal distortion occurs due to light illumination
Solution Approach 1:
The patent implements preliminary transfer of charges from the photodiode to the floating diffusion node before readout operations. By transferring the reset charge and sensed pixel signal to the floating diffusion node in advance, the signals are prepared for subsequent processing without remaining in the illuminated photodiode region where light-induced distortion would occur.
3Device complexity
If direct readout of reset charge and sensed pixel signal is implemented without temporary storage, then circuit cost is reduced, but multiple pixel data readout circuits are needed for simultaneous readout in global shutter mode
Solution Approach 1:
The patent uses the floating diffusion node as a temporary holding point where both reset charge and sensed pixel signal are transferred before final readout. This preliminary storage at the floating diffusion node enables sequential processing and single-readout operations, eliminating the need for multiple simultaneous readout circuits while maintaining global shutter functionality.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design reduces circuit costs and minimizes signal distortion by allowing simultaneous readout of reset and exposure charges without temporary storage, achieving accurate pixel value calculation and reducing the number of transistor circuits required.
Implementation Method 1
The image sensor cell comprises a photodiode
Data Source
AI summary
An image sensor apparatus includes a pixel array having pixel units each including an image sensor cell and a processing circuit. The processing circuit includes a bias transistor, second floating diffusion node, first switch unit, signal transfer capacitor, reset transfer capacitor, second switch unit, and third switch unit. Bias transistor is coupled between first and second floating diffusion nodes and has control terminal coupled to bias voltage. First switch unit is coupled between first and second floating diffusion nodes. Second switch unit is coupled between second floating diffusion node and signal transfer capacitor. Third switch unit is coupled between second floating diffusion node and reset transfer capacitor. Signal transfer capacitor is selectively coupled to second floating diffusion node. Reset transfer capacitor is selectively coupled to second floating diffusion node.