Image Sensor Ramp Signal Counter for Low Power CDS

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Solution Overview

Problem

Image sensing devices face challenges in performing exact correlated double sampling (CDS) operations while minimizing power consumption, particularly due to high current consumption by counters during data processing.

Innovation Solution

The implementation of a ramp signal generation unit, comparison units, and counting units that perform up-count and down-count operations to latch and adjust data values, allowing for efficient CDS operations with reduced power consumption by externalizing the counting process and using internal offset values for noise reduction.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If counters are used for data processing in each column, then A/D conversion and CDS operations can be performed, but current consumption increases significantly

Engineering Contradiction:
Improvedata processing accuracyVSAvoidcurrent consumption
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The patent extracts the counting function from individual column circuits and consolidates it into a single shared counter. The counter is controlled by enable signals that activate it only when needed for specific columns, allowing the same hardware resource to serve multiple columns without each column requiring its own dedicated counter, thus reducing overall current consumption while maintaining processing capability.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The single counter is designed to perform multiple functions: it serves as the counting unit for A/D conversion across all columns, implements CDS operations by comparing pixel signals with offset values, and can be selectively activated for different columns through control signals. This multi-functional design eliminates the need for separate dedicated counters for each column.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Productivity

If clock speed is increased to improve image resolution, then processing speed increases, but power consumption increases substantially

Engineering Contradiction:
Improveimage processing speedVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The counter operates periodically rather than continuously, being activated only when a column requires processing through selective enable signals. The counter performs its counting operation during specific time windows corresponding to column processing needs, then remains inactive, reducing average power consumption while maintaining high processing speed when active.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The system dynamically controls counter operation through enable signals that activate the counter only when and where needed. This dynamic activation based on actual processing requirements allows the system to maintain high performance when processing is needed while minimizing power consumption during idle periods.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS9019409B2Image sensing device and method for operating the same
Publication Date: 2015.04.28 SK HYNIX INC
  • US9019409B2 patent drawing
  • US9019409B2 patent drawing
  • US9019409B2 patent drawing

AI summary

An image sensing device includes, inter alia, a ramp signal generation unit generating a ramp signal that decreases during first and second periods for finding data values corresponding to a pixel signal and an offset value, respectively. The image sensing device also includes a comparison unit compares the pixel signal with the ramp signal during the first period, and compares the ramp signal with an internally generated offset value during the second period. A first counting unit is configured to perform a counting operation during the first period, and a second counting unit configured to latch a count value of the first counting unit as a data value in response to the result of the first comparison operation during the first period, perform a down-count operation from the latched data value in response to the result of the second comparison operation during the second period, and latch a counting result.