CMOS Image Sensor Ramp DAC Switching for High-Speed Gain Transition

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Solution Overview

Problem

The existing DAC circuits face challenges in high-speed gain transition due to prolonged settling times when frequently switching gain values, which can compress the read time for A/D conversion.

Innovation Solution

A solid state image sensor is designed with multiple ramp generation DACs and sample hold circuits corresponding to different gains, allowing for individual holding of gain DAC output voltages, enabling rapid gain transitions through a ramp selection signal, and optionally including a clamp DAC for offset addition.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If a single gain control DAC is used to control output gain of the ramp wave, then device complexity is reduced, but gain transition speed deteriorates due to prolonged settling time

Engineering Contradiction:
Improvenumber of DAC circuitsVSAvoidgain transition speed
Core Design Contradiction:
Device complexityVSSpeed

Solution Approach 1:

The patent divides the single gain control DAC into multiple parallel DAC circuits (first DAC and second DAC), each handling different gain ranges. This segmentation allows simultaneous preparation of multiple gain values, eliminating the sequential settling time bottleneck while maintaining manageable device complexity through structured parallelism.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements preliminary action by pre-calculating and preparing multiple ramp waves with different gains simultaneously using parallel DAC circuits before A/D conversion. The control unit selects and switches between pre-prepared ramp waves based on signal amplitude, eliminating the need for real-time gain adjustment during conversion and thus removing settling time delays.

Inventive Principle:
Principle #10Preliminary action

2Adaptability or versatility

If gain value is frequently switched in a single DAC circuit, then adaptability to different signal levels is improved, but read time for A/D conversion deteriorates due to compressed timing window

Engineering Contradiction:
Improvegain switching capabilityVSAvoidread time for A/D conversion
Core Design Contradiction:
Adaptability or versatilityVSLoss of time

Solution Approach 1:

The patent segments the gain control function into multiple parallel DAC circuits, each dedicated to specific gain ranges. This allows frequent gain switching to be achieved by simply selecting between pre-computed ramp waves from different DACs rather than dynamically adjusting a single DAC, thereby maintaining high adaptability while preserving the full A/D conversion read time window.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent creates multiple copies of the DAC function (first DAC and second DAC) operating in parallel, where each copy generates ramp waves for different gain scenarios. This copying approach enables the system to have multiple gain configurations ready simultaneously, allowing instant switching without the time penalty of reconfiguring a single DAC during the read phase.

Inventive Principle:
Principle #26Copying

3Speed

If multiple ramp generation DACs are used corresponding to different gains, then gain transition speed is improved, but device complexity increases

Engineering Contradiction:
Improvegain transition speedVSAvoidnumber of ramp generation DACs
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent implements multi-functionality by designing DAC circuits that can serve dual purposes: generating ramp waves for A/D conversion while simultaneously acting as gain control elements. The control unit intelligently selects which DAC to use based on signal amplitude requirements, allowing the same hardware infrastructure to handle both conversion and gain control functions, thus improving gain transition speed without proportionally increasing overall device complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS9930283B2Solid state image sensor and electronic apparatus
Publication Date: 2018.03.27 SONY GROUP CORP
  • US9930283B2 patent drawing
  • US9930283B2 patent drawing
  • US9930283B2 patent drawing

AI summary

The present disclosure relates to a solid state image sensor and an electronic apparatus capable of performing a gain transition at high speed. A ramp generation circuit includes sample hold circuits and ramp generation DACs, the number of which depends on kinds of required gains (for example, two kinds, i.e. a low gain and a high gain). Then, the two sample hold circuits can individually hold gain DAC output voltages at the different gains. This enables a switch to the ramp generation DAC holding the required gain voltage by means of a ramp selection signal. The present disclosure can be applied, for example, to a CMOS solid state image sensor that is used for an imaging device.