Image Sensor Readout Circuit Overlapping CDS and ADC
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Solution Overview
Problem
Image sensors face a trade-off between higher resolution, speed, and lower power consumption, as increased resolution leads to slower readout speeds due to parasitic loading, while compact circuit designs reduce power efficiency.
Innovation Solution
The design incorporates pixels and readout circuits where at least two pixels share a bitline and associated readout circuit, with a correlated double sampling (CDS) circuit and analog-to-digital converter (ADC) operating concurrently, utilizing two capacitor banks in parallel to enhance speed and reduce power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If more pixels are disposed in a given area to increase resolution, then resolution is improved, but parasitic loading increases and readout speed decreases
Solution Approach 1:
Multiple pixels share common bitlines and readout circuits, merging their signal paths. Specifically, at least two pixels of a row share a bitline and an associated readout circuit, reducing the total number of readout circuits while maintaining high pixel density for high resolution
Solution Approach 2:
The CDS circuit and ADC operate concurrently with overlapping operating periods, ensuring continuous signal processing without idle waiting time. The ADC operates concurrently with the CDS circuit, such that their operating periods are substantially overlapped with each other
2Measurement precision
If more pixels are disposed in a given area to increase resolution, then resolution is improved, but power consumption increases
Solution Approach 1:
Multiple pixels share common bitlines and readout circuits, merging their signal paths. Specifically, at least two pixels of a row share a bitline and an associated readout circuit, reducing the total number of readout circuits while maintaining high pixel density for high resolution
Solution Approach 2:
The shared readout circuit serves multiple pixels simultaneously, making it a universal component that handles signals from multiple sources. This multi-functional approach reduces the overall circuit count and power consumption
3Use of energy by stationary object
If circuit area is reduced to achieve more compact design, then power consumption is reduced, but resolution and speed are compromised
Solution Approach 1:
Multiple pixels share common bitlines and readout circuits, merging their signal paths. Specifically, at least two pixels of a row share a bitline and an associated readout circuit, reducing the total number of readout circuits while maintaining high pixel density for high resolution
Solution Approach 2:
The patent organizes pixels in a two-dimensional array with systematic sharing patterns (at least two pixels of a row share a bitline), efficiently utilizing spatial dimensions to reduce circuit area while preserving resolution capability
Data Source
AI summary
An image sensor includes readout circuits coupled to read out integrated light signals from pixels via bitlines respectively. Each readout circuit includes a correlated double sampling (CDS) circuit, followed by an analog-to-digital converter (ADC). At least two pixels of a row share a bitline and an associated readout circuit. The ADC operates concurrently with the CDS circuit, such that their operating periods are substantially overlapped with each other.


