Image Sensor Selective Pixel Binning Voltage Domain
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Solution Overview
Problem
Conventional image sensors face limitations in flexibility and frame rates due to their fixed pixel binning capabilities, which restrict their performance in capturing images effectively.
Innovation Solution
The implementation of transistors that enable selective pixel binning in the voltage domain, allowing for flexible binning modes such as 1×1, 2×2, and 4×4 configurations by coupling floating diffusion regions of adjacent pixels, thereby increasing frame rates without destructive readout.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If conventional pixel binning is implemented by combining electrons from multiple pixels on a single node before readout, then pixel binning capability is achieved, but flexibility and frame rate are limited
Solution Approach 1:
The patent implements dynamic pixel binning by using transistors to selectively couple floating diffusion regions of adjacent pixels in real-time. This allows the binning configuration to change dynamically between frames, enabling flexible adaptation to different imaging scenarios while maintaining high frame rates through efficient readout pathways.
Solution Approach 2:
The pixel array is segmented into groups where floating diffusion regions can be independently coupled or decoupled through transistor control. This segmentation enables selective binning of specific pixel groups while leaving others independent, providing flexibility in binning patterns and maintaining high readout speeds by processing segmented data streams.
2Adaptability or versatility
If digital signals from pixels are combined after readout in conventional image sensors, then pixel binning is achieved, but flexibility and frame rate remain limited
Solution Approach 1:
The patent performs preliminary binning actions at the floating diffusion stage before full readout occurs. By coupling floating diffusion regions of adjacent pixels through transistors, the binning is established in advance, allowing the readout circuitry to efficiently process already-binned signals and achieve higher frame rates with flexible binning configurations.
3Ease of manufacture
If fixed pixel binning is used in image sensors, then manufacturing is simplified, but adaptability to different imaging applications is reduced
Solution Approach 1:
The patent incorporates universal transistor structures and floating diffusion coupling mechanisms that can be manufactured using standard CMOS processes. These components enable the same sensor to perform multiple functions - acting as either individually readable pixels or binning groups - providing application-specific flexibility without requiring different manufacturing processes for different binning modes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the flexibility and frame rate of image sensors, enabling better capture of moving objects and improving imaging performance by allowing non-destructive sampling of pixel signals in multiple binning modes within a single frame.
Implementation Method 1
Each image pixel in the array includes a photodiode that is coupled to a floating diffusion region via a transfer gate. Each pixel receives incident photons (light) and converts the photons into electrical signals.
Data Source
AI summary
An image sensor may include an array of imaging pixels. Each imaging pixel may have a photodiode that generates charge in response to incident light, a floating diffusion region, and a transfer transistor that transfers charge from the photodiode to the floating diffusion region. Each floating diffusion region may have an associated capacitance formed by a depletion region between n-type and p-type regions in a semiconductor substrate. To enable selective binning in the voltage domain, a number of transistors may be coupled to the floating diffusion capacitors. A first plurality of pixels may selectively couple the floating diffusion capacitors to ground. A second plurality of pixels may selective couple the floating diffusion capacitors to the floating diffusion capacitors of adjacent pixels. The voltages of multiple floating diffusion capacitors may be non-destructively binned on a single floating diffusion capacitor during readout.