Image Sensor ADC Using Single-Ramp Coarse-Fine Conversion
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Solution Overview
Problem
Conventional analog to digital converters in image sensors face issues such as excessive power consumption, offset mismatching, and ramp voltage slope mismatching, leading to suboptimal image quality due to the use of multiple ramp voltages and sampling capacitors.
Innovation Solution
The implementation of an analog to digital converter (ADC) with a multi-input comparison unit that modifies comparison voltages in coarse and fine modes, using a single ramp voltage and eliminating sampling capacitors, to generate a high-quality image by preventing offset mismatching and reducing power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If multiple ramp voltages are used in conventional ADCs, then measurement precision can be improved, but device complexity and power consumption increase
Solution Approach 1:
The conversion process is divided into two distinct modes: coarse conversion mode and fine conversion mode. In coarse mode, the ADC determines the most significant bits (MSBs) of the pixel voltage, while in fine mode, it determines the least significant bits (LSBs). This segmentation allows the system to achieve high precision without requiring multiple ramp voltages simultaneously, thereby reducing device complexity while maintaining measurement accuracy.
Solution Approach 2:
The ADC dynamically switches between coarse and fine conversion modes based on the conversion progress. The comparison voltage is modified differently in each mode: in coarse mode, it steps through larger voltage ranges to quickly establish MSBs, while in fine mode, it makes finer adjustments to determine LSBs. This dynamic operation enables high precision conversion using a single ramp voltage source.
2Measurement precision
If sampling capacitors are used in conventional ADCs, then measurement precision is improved, but offset mismatching and power consumption increase
Solution Approach 1:
The invention extracts and eliminates the sampling capacitor component from the ADC circuit. Instead of using sampling capacitors to hold the pixel voltage during conversion, the system directly compares the pixel voltage with the ramp voltage in a continuous manner during both coarse and fine conversion modes. This removal of sampling capacitors eliminates the associated offset mismatching problems and reduces power consumption while maintaining conversion precision.
3Measurement precision
If multiple ramp voltages are used in conventional ADCs, then measurement precision is improved, but offset mismatching occurs
Solution Approach 1:
The invention uses a single ramp voltage source for both coarse and fine conversion modes, ensuring homogeneity in the voltage reference throughout the entire conversion process. This eliminates offset mismatching that would otherwise occur between different ramp voltage sources. The consistent use of one ramp voltage source guarantees reliable and accurate conversion results without the need for complex offset matching circuits.
Data Source
AI summary
An analog to digital converter (ADC) can include a multi-input comparison unit configured to compare a pixel voltage from an image sensor, a comparison voltage comprising a stepped voltage modified during a coarse mode of operation, and a ramp voltage comprising a ramped voltage modified to one another during a fine mode of operation, to provide a comparison result signal that indicates whether the comparison voltage combined with the ramp voltage is greater than or less than the pixel voltage. A selection control signal generation unit can receive the comparison result signal and a mode control signal, to indicate the coarse or fine mode, to provide a selection control signal allowing modification of the comparison voltage in the coarse mode and to hold the comparison voltage constant in the fine mode. A reference voltage selection unit can receive the selection control signal to control modification of the comparison voltage.