Image Sensor SRAM With Gray-Coded Reduced-Voltage Switching
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Solution Overview
Problem
The increasing demand for higher frame rates and image resolution in image sensors leads to higher power consumption, which is a challenge as image sensors are miniaturized and integrated into various devices, necessitating a reduction in power usage.
Innovation Solution
A low power SRAM is implemented using a Gray counter to switchably couple positive and negative supply voltages with differential inputs of memory cells, reducing power consumption by generating lower reference voltages and using them as differential inputs, as controlled by the Gray code counter.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the operating frequency of memory cells is increased to satisfy higher frame rates and image resolution, then data transfer rate is improved, but power consumption increases
Solution Approach 1:
The patent changes the voltage parameter from full swing (0 to VDD) to reduced swing (Vn to VP), where VP and VN are lower reference voltages generated by a voltage generation circuit. This parameter change reduces the voltage swing amplitude, directly lowering power consumption while maintaining the same data transfer rate through the memory cells
2Reliability
If full voltage swing is used for differential inputs to memory cells, then signal integrity is maintained, but power consumption increases
Solution Approach 1:
The patent changes the voltage parameter from full swing (0 to VDD) to reduced swing (Vn to VP), where VP and VN are lower reference voltages generated by a voltage generation circuit. This parameter change reduces the voltage swing amplitude, directly lowering power consumption while maintaining the same data transfer rate through the memory cells
Solution Approach 2:
The patent introduces a voltage generation circuit as an intermediary component that generates reduced reference voltages (VP and VN) from the main power supply. This intermediary circuit enables the memory cells to operate with lower voltage swings, reducing power consumption while maintaining signal integrity through the differential signaling approach
Data Source
AI summary
A low power SRAM (static RAM) for an image sensor includes a voltage generation circuit for providing a positive supply voltage VP and a negative supply VN, wherein VDD>Vp>Vn>Vgnd; a plurality of memory cells coupled to a respective plurality of column sense lines in a pixel array, the plurality of memory cells receiving differential inputs dp and dn; and a Gray counter coupled to switchably couple VP and VN to the differential inputs dp and dn of the plurality of memory cells. A method of operating an image sensor with a low power SRAM includes acquiring an image by the image sensor; generating VP and VN such that VDD>VP>VN>Vgnd; receiving an output g of a column of pixels at a clock input of a memory cell; and switchably coupling VP and VN to the differential inputs dp and dn of a plurality of memory cells in the SRAM according to a codeword from a Gray counter.