Solid-State Image Sensor Stacking for Heat Dissipation and Leakage Control

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Solution Overview

Problem

Current solid-state imaging devices, such as CMOS and CCD, face limitations in improving the quality and reliability of large-sized camera image sensors, particularly in terms of thermal conductivity and potential leakage currents due to the bonding technologies used in chip-on-wafer or chip-on-chip processes.

Innovation Solution

The implementation of a solid-state imaging device with a three-layer or four-layer structure, where a sensor substrate is bonded with analog and logic circuit substrates of varying sizes, and a support substrate, using direct bonding and insulating layers or cavities to enhance thermal dissipation and electrically separate potential regions, thereby reducing leakage currents.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If direct bonding is used to laminate substrates, then manufacturing precision and reliability are improved, but thermal conductivity deteriorates due to bonding interface resistance

Engineering Contradiction:
Improvebonding reliabilityVSAvoidthermal conductivity
Core Design Contradiction:
ReliabilityVSTemperature

Solution Approach 1:

A support substrate is introduced as an intermediary component between the circuit substrate and the insulating layer. This support substrate serves as a thermal conduction path that bridges the thermal resistance at the bonding interface, allowing heat to be efficiently conducted from the circuit substrate through the support substrate to the insulating layer and ultimately to the heat sink, while maintaining the bonding reliability of the direct bonding structure.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Adaptability or versatility

If substrates of different sizes are bonded together, then device integration is improved, but stress concentration occurs at the bonding interface

Engineering Contradiction:
Improvesubstrate integrationVSAvoidbonding interface stress
Core Design Contradiction:
Adaptability or versatilityVSStress or pressure

Solution Approach 1:

The support substrate acts as a stress-distributing intermediary between the smaller circuit substrate and the larger insulating layer. It provides a transition zone that distributes the mechanical stress uniformly across the bonding interface, preventing stress concentration at the corners and edges where the substrate size changes, thereby maintaining bonding reliability while enabling substrate integration of different sizes.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If insulating layers are used to electrically separate substrates, then electrical isolation is improved, but thermal dissipation deteriorates

Engineering Contradiction:
Improveelectrical isolationVSAvoidthermal dissipation
Core Design Contradiction:
ReliabilityVSTemperature

Solution Approach 1:

The support substrate serves as a thermal conduction intermediary that bypasses the thermal resistance of the insulating layer. While the insulating layer maintains electrical isolation between substrates, the support substrate provides a dedicated thermal conduction path that conducts heat laterally from the bonding interface to the insulating layer, enabling effective thermal dissipation without compromising electrical isolation.

Inventive Principle:
Principle #24Intermediary (Mediator)

4Ease of manufacture

If chip on wafer or chip on chip bonding is used, then cost reduction is achieved, but leakage currents increase due to potential differences

Engineering Contradiction:
Improvemanufacturing costVSAvoidleakage current
Core Design Contradiction:
Ease of manufactureVSObject-generated harmful factors

Solution Approach 1:

The support substrate acts as an electrical isolation intermediary between regions with different potentials on the circuit substrate. By providing a high-resistance path through its insulating properties, it prevents leakage currents from flowing between different potential regions while maintaining the cost-effective chip on wafer or chip on chip bonding structure.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration improves thermal conductivity, reduces pixel characteristic variations, and effectively prevents leakage currents by relaxing stress on substrates and enhancing heat dissipation through the support substrate, leading to improved reliability and quality of the imaging device.

Implementation Method 1

improves thermal conductivity, reduces pixel characteristic variations, and effectively prevents leakage currents by relaxing stress on substrates and enhancing heat dissipation through the support substrate

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Implementation Method 2

a second substrate laminated on the first substrate by direct bonding on a side opposite to a light incident side of the first substrate

Methodology Applied
Scientific EffectDirect bonding: Diffusion Welding

Data Source

PatentUS20230395636A1Solid-state imaging device, method of manufacturing solid-state imaging device, and electronic device
Publication Date: 2023.12.07 SONY SEMICON SOLUTIONS CORP
  • US20230395636A1 patent drawing
  • US20230395636A1 patent drawing
  • US20230395636A1 patent drawing

AI summary

To provide a solid-state imaging device capable of further improving quality and reliability of the solid-state imaging device. Provided is a solid-state imaging device including: a first substrate; a second substrate laminated on the first substrate by direct bonding on a side opposite to a light incident side of the first substrate, the second substrate having a size different from a size of the first substrate; a third substrate provided on a side opposite to a light incident side of the second substrate; and an insulating layer formed between the first substrate and the third substrate, in which the third substrate includes a well formed on a light incident side of the third substrate.