Image Sensor Sub-Array A/D Conversion for High-Speed Zoom

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Solution Overview

Problem

Conventional image sensors with a single IC chip and 2D light receiving element arrays face challenges in achieving high-speed and high-resolution operations, particularly in zoom-in functions, due to inefficient A/D conversion processes that require processing entire image planes rather than targeted areas, limiting their application in high-performance and high-resolution applications.

Innovation Solution

The image sensor is configured with a light receiving element array divided into sub-arrays, each with its own A/D converter, utilizing a pulse delay circuit and coding circuit to perform A/D conversion only on selected sub-arrays, allowing for high-speed and high-resolution processing by adjusting the sampling time period and number of delay stages, thereby optimizing data resolution and reducing unnecessary processing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If A/D conversion is performed on the entire image plane, then complete image data is obtained, but processing time increases and high-speed operation becomes difficult

Engineering Contradiction:
Improveimage data completenessVSAvoidprocessing speed
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

The light receiving element array is divided into multiple sub-arrays, and A/D conversion is performed selectively on only the sub-arrays corresponding to the target area for zoom-in processing. This segmentation allows the system to process only necessary portions of the image data, thereby achieving high-speed operation while maintaining data completeness for the region of interest.

Inventive Principle:
Principle #1Segmentation

2Loss of information

If A/D conversion is performed on the entire image plane, then all image data is captured, but processing time is excessive for real-time applications

Engineering Contradiction:
Improveimage data completenessVSAvoidprocessing time
Core Design Contradiction:
Loss of informationVSLoss of time

Solution Approach 1:

The system extracts and processes only the sub-arrays corresponding to the target area for zoom-in operations, removing the unnecessary processing of other regions. This extraction approach maintains complete image data for the region of interest while significantly reducing processing time to meet real-time requirements.

Inventive Principle:
Principle #2Taking out (Extraction)

3Ease of manufacture

If conventional A/D conversion circuits are used, then circuit configuration is simple, but circuit size is large and integration density is reduced

Engineering Contradiction:
Improvecircuit configuration simplicityVSAvoidIC chip size
Core Design Contradiction:
Ease of manufactureVSArea of stationary object

Solution Approach 1:

The patent employs dynamic A/D conversion circuits that can adaptively adjust their operation based on the selected sub-arrays and zoom-in requirements. This dynamic approach allows the circuits to maintain simplicity in configuration while reducing their effective size through selective activation and time-multiplexed operation, thereby increasing integration density on the IC chip.

Inventive Principle:
Principle #15Dynamics

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration enables efficient high-speed and high-resolution zoom-in operations without increasing overall processing time, allowing for precise A/D conversion data collection and reducing the size of the IC chip, while minimizing noise and optimizing data resolution.

Implementation Method 1

The light receiving element array has at least picture element cells made of photoelectric conversion elements arranged in a 2D array

Methodology Applied
Scientific EffectPhotoelectric conversion: Photoelectric Effect

Data Source

PatentUS7671313B2Image sensor and control method of the image sensor
Publication Date: 2010.03.02 DENSO CORP
  • US7671313B2 patent drawing
  • US7671313B2 patent drawing
  • US7671313B2 patent drawing

AI summary

An image sensor has plural array blocks B1 to B20 arranged in a two dimensional (2D) arrangement. Each array block has a sub array and a corresponding analogue to digital (A/D) converter for performing an A/D conversion of light signals (or detection signals) output from the sub array. The sub array has plural picture element cells arranged in a 2D arrangement. Each A/D converter has a pulse delay circuit having delay units of plural stages connected in series. Each delay unit delays an input pulse by a delay time corresponding to a level of the light signals received from the sub array. A pulse delay type A/D converter is used as the A/D converter, which outputs the number of the delay units as an A/D conversion data item through which the input pulse passes for a measurement time period.