Image Sensor Substrate Vertical Routing Signal Integrity
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Solution Overview
Problem
Conventional integrated circuit packaging techniques, such as ball grid array and flip chip, increase signal path distance, leading to signal delay and attenuation, and suffer from disconnection issues and thermal expansion mismatch between conductive pads and epoxy, degrading chip performance and reliability.
Innovation Solution
The proposed solution involves forming conductive vias and pads on a substrate with a conductive layer and bumps, embedding these within the package structure to reduce signal path length and using CTE-matching dielectric layers to prevent delamination, while aligning microlenses with image sensing elements for improved connectivity and thermal management.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional packaging techniques (BGA, wire bonding, flip chip) are used to mount die on substrate, then electrical interconnection is provided, but signal path distance increases causing signal delay and attenuation
Solution Approach 1:
The patent transitions from planar signal routing to three-dimensional vertical routing by forming conductive vias through the substrate. This allows signals to travel vertically through the substrate thickness rather than laterally across the substrate surface, significantly reducing the signal path distance and improving signal integrity.
Solution Approach 2:
Instead of routing signals from the bonding points on the substrate surface to external terminals, the patent inverts the approach by routing signals vertically through the substrate from one surface to the other. This inversion of the signal path direction eliminates the need for long lateral traces and reduces signal delay.
2Reliability
If conductive pads and electrical contacts are used for electrical connection, then connectivity is achieved, but disconnection may occur at the point of contact due to small contact area
Solution Approach 1:
The patent extends the connection from a two-dimensional point contact to a three-dimensional structure by forming conductive vias that traverse the substrate thickness. This provides a volumetric connection path with significantly larger effective contact area, eliminating the disconnection issue associated with small point contacts.
Solution Approach 2:
The patent employs a composite conductive structure consisting of conductive vias filled with conductive material and overlaid with conductive pads and layers. This composite structure combines multiple conductive elements to create a robust connection that resists disconnection.
3Stability of the object's composition
If epoxy is used to seal and bond layers, then packaging is achieved, but CTE mismatch between epoxy, conductive pads, and electrical contacts causes delamination
Solution Approach 1:
The patent addresses CTE mismatch by modifying the material parameters of the conductive vias and surrounding structures. By carefully selecting conductive materials with CTE values intermediate between the epoxy and the rigid contacts, the patent creates a gradual CTE transition that reduces thermal stress and prevents delamination during temperature cycling.
4Ease of operation
If inner traces are used to fan out bonding points, then electrical distribution is achieved, but signal path distance increases and chip performance degrades
Solution Approach 1:
The patent replaces lateral fan-out traces with vertical via-based routing. Instead of distributing signals across the substrate surface using long traces, the patent routes signals vertically through the substrate thickness, dramatically reducing the signal path length while maintaining effective electrical distribution to all necessary points.
Data Source
AI summary
Image sensing devices and methods for fabricating the same are provided. An exemplary image sensing device comprises a first substrate having a first side and a second side opposing each other. A plurality of image sensing elements is formed in the first substrate at the first side. A conductive via is formed through the first substrate, having a first surface exposed by the first substrate at the first side and a second surface exposed by the first substrate at the second side. A conductive pad overlies the conductive via at the first side and is electrically connecting the image sensing elements. A conductive layer overlies the conductive via at the second side and electrically connects with the conductive pad. A conductive bump is formed over a portion of the conductive layer. A second substrate is bonded with the first substrate at the first side.