Image Sensor Switch Circuit for Simultaneous Row Readout
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Image sensors face challenges in increasing output speed while maintaining high resolution, as existing technologies do not efficiently utilize analog-to-digital converters to read multiple rows simultaneously during a single access time.
Innovation Solution
The image sensor employs a switch arrangement circuit that connects pairs of column lines to analog-to-digital converters, allowing simultaneous reading of pixel signals from two rows through capacitors and switch control signals, generating digital signals based on ramp signals with varying levels, thereby optimizing the connection and conversion process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multiple rows are read during a single access time to increase output speed, then frame rate is improved, but device complexity increases due to additional switch arrangement circuits and capacitor connections
Solution Approach 1:
The pixel array columns are divided into multiple column pairs, with each column pair independently connectable to analog-to-digital converter pairs through switch arrangement circuits. This segmentation allows simultaneous reading of multiple rows by activating different column pairs in parallel, thereby increasing frame rate while distributing the circuit complexity across modular units rather than requiring a monolithic complex circuit.
2Manufacturing precision
If all analog-to-digital converters are utilized for high-resolution imaging, then manufacturing precision is improved, but productivity decreases due to sequential reading requirements
Solution Approach 1:
The switch arrangement circuits enable dynamic reconfiguration of column pair connections to analog-to-digital converter pairs. During a single access time, different column pairs can be dynamically connected to different analog-to-digital converter pairs, allowing simultaneous reading of multiple rows. This dynamic switching capability enables the system to maintain high-resolution imaging by utilizing all analog-to-digital converters while simultaneously increasing output speed through parallel row reading.
3Productivity
If switch arrangement circuits are added to enable simultaneous row reading, then productivity is improved, but noise increases due to additional circuit components
Solution Approach 1:
The switch arrangement circuits are controlled to operate in periodic cycles, switching between different column pair connections in a timed manner. During each access time period, specific switches are activated to connect particular column pairs to analog-to-digital converter pairs, while other switches remain inactive. This periodic switching allows simultaneous reading of multiple rows to increase frame rate while minimizing noise by ensuring that at any given moment, only necessary switch transitions occur, rather than all switches operating simultaneously.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the image sensor to read multiple rows during a single access time, increasing frame rate and minimizing the size of the readout circuit while reducing noise and improving dynamic range in the generated images.
Implementation Method 1
a switch arrangement which is controlled so that the first capacitor may share a charge and the second capacitor pair may share a charge in response to the first switch control signals
Implementation Method 2
one of the analog-to-digital converter pair may generate a first digital signal based on the first ramp signal and a signal output from the switch arrangement circuit, and the other of the analog-to-digital converter pair may generate a second digital signal based on the second ramp signal and a signal output from the switch arrangement circuit
Data Source
AI summary
An image sensor includes a first column pair and a second column pair among a plurality of columns of a pixel array, an analog-to-digital converter pair, and a switch arrangement circuit configured to connect the first column pair with the analog-to-digital converter pair in response to first switch control signals such that two rows among a plurality of rows in the pixel array are read during a single access time.