Stacked Image Sensor Bias Pad Layout for Threshold Voltage Tuning

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current stacked image sensors face challenges in adjusting the threshold voltage of transistors, which affects their performance and efficiency in converting optical images into electrical signals.

Innovation Solution

The design includes a specific structure with a first substrate having a photoelectric conversion region, interlayer insulating layers, a semiconductor layer, and bias pads that allow for easy adjustment of the threshold voltage of transistors by applying voltage to the bias pads, thereby optimizing the performance of the image sensor.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If a stacked image sensor structure is used to reduce planar area and increase resolution, then the sensor size is reduced and resolution is heightened, but the threshold voltage of transistors becomes difficult to adjust

Engineering Contradiction:
ImproveresolutionVSAvoidthreshold voltage adjustment
Core Design Contradiction:
Measurement precisionVSEase of operation

Solution Approach 1:

The gate structure is segmented into a first gate electrode and a second gate electrode that can be independently controlled. The bias pad is also segmented into a first bias pad connected to the first gate and a second bias pad connected to the second gate. This segmentation allows independent voltage adjustment of each gate, enabling precise threshold voltage control of the transistor while maintaining the stacked sensor structure for high resolution.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces dynamic voltage control capabilities through the bias pads that can apply different voltages to the first and second gates independently. This dynamic control allows the threshold voltage to be adjusted in real-time based on operating conditions, transforming a static structure into a dynamically adjustable system that optimizes performance while maintaining compact stacking.

Inventive Principle:
Principle #15Dynamics

2Productivity

If the transistor threshold voltage is not easily adjustable, then the device structure remains simple, but the performance and efficiency in converting optical images into electrical signals deteriorates

Engineering Contradiction:
Improvesignal processing speedVSAvoidgate and bias pad structure
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The dual-gate transistor structure with independent bias pads serves multiple functions: it acts as a standard transistor for signal processing, provides threshold voltage adjustment capability, and enables optimization of both performance and efficiency. The first and second gates can be used together or independently, making the structure universally applicable while enhancing signal processing speed through configurable threshold voltage control.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration enables precise adjustment of transistor threshold voltages, enhancing the image sensor's ability to convert optical images into electrical signals with improved resolution and processing speed, addressing the limitations of existing technologies.

Implementation Method 1

A photoelectric conversion region is in the first substrate

Methodology Applied
Scientific EffectPhotoelectric conversion: Photoelectric Effect

Data Source

PatentUS12199127B2Image sensor
Publication Date: 2025.01.14 SAMSUNG ELECTRONICS CO LTD
  • US12199127B2 patent drawing
  • US12199127B2 patent drawing
  • US12199127B2 patent drawing

AI summary

An image sensor includes a first substrate. A photoelectric conversion region is in the first substrate. A first interlayer insulating layer is on the first substrate. A transistor includes a bonding insulating layer on the first interlayer insulating layer, a semiconductor layer on the bonding insulating layer, and a first gate on the semiconductor layer. A bias pad is spaced apart from the semiconductor layer by the bonding insulating layer. The bias pad overlaps the first gate in a planar view. A second interlayer insulating layer covers the transistor.