Solid-state imaging device and method for manufacturing the same, and electronic apparatus
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Solution Overview
Problem
Conventional solid-state imaging devices with vertical transfer transistors experience reduced pixel driving speed due to parasitic capacitance from the gate electrode being embedded in the semiconductor layer, affecting the transfer of signal charges to the charge accumulation region.
Innovation Solution
The design includes a transfer transistor with a gate electrode having a first portion adjacent to the active region and a second portion adjacent to the isolation insulating film, reducing parasitic capacitance by minimizing the side walls adjacent to the semiconductor layer, and a method for manufacturing this configuration involving the formation of isolation trenches, isolation insulating films, and gate trenches to control the depth and structure of the gate electrode.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If the gate electrode is embedded in the semiconductor layer with the gate insulating film interposed therebetween, then the transfer transistor can be formed with a vertical structure, but parasitic capacitance increases due to side walls adjacent to the semiconductor layer, reducing transfer speed
Solution Approach 1:
The gate electrode is extracted from being fully embedded in the semiconductor layer. Instead, the gate electrode is positioned such that its side walls are adjacent to the isolation insulating film rather than the semiconductor layer, removing the source of parasitic capacitance while maintaining the vertical structure benefits
Solution Approach 2:
The isolation insulating film serves as an intermediary between the gate electrode and the semiconductor layer. By positioning the gate electrode side walls adjacent to the isolation insulating film, the harmful direct adjacency between gate electrode side walls and semiconductor layer is eliminated, reducing parasitic capacitance
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances the transfer speed of signal charges by reducing capacitance in the transfer line, improving pixel driving speed and minimizing variations in transfer characteristics, while maintaining the necessary depth for the photoelectric conversion unit's separation from the charge accumulation region.
Implementation Method 1
a photoelectric conversion unit provided in the semiconductor layer to be separated from the charge accumulation region in a depth direction
Data Source
AI summary
A transfer speed (pixel driving speed) at which a signal charge photoelectrically converted by a photoelectric conversion unit is transferred to a charge accumulation region is improved. A solid-state imaging device includes: a semiconductor layer having an active region defined by an isolation region on a first surface side; a charge accumulation region in the active region; a photoelectric conversion unit in the semiconductor layer and separated from the charge accumulation region in a depth direction; and a transfer transistor with a gate electrode in an isolation region that transfers a signal charge from the photoelectric conversion unit to the charge accumulation region. The isolation region includes an isolation insulating film on the first surface side of the semiconductor layer, and the gate electrode includes a first portion adjacent to the active region with a gate insulating film interposed therebetween and a second portion adjacent to the isolation insulating film.