Image Sensor Pixel Transistor Layout for Faster Low-Noise Readout
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Solution Overview
Problem
Current image sensors face challenges in optimizing the arrangement and sharing of transistors within the pixel area to enhance signal transfer speed and reduce dark current or noise, particularly due to the limitations of transistor area configuration and isolation methods.
Innovation Solution
The image sensor design includes a transistor set with a specific arrangement of reset, source follower, and selection transistors, where transistors share common source or drain areas, and the transistors are connected in parallel to increase channel width, thereby improving transconductance and reducing RC delay, while eliminating the need for separate isolation areas.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If transistors are arranged with separate isolation areas, then device reliability is improved, but device complexity and area occupation increase
Solution Approach 1:
The patent merges the isolation function into the common source/drain areas shared by adjacent transistors. The common source/drain area serves dual purposes: as the electrical connection point for parallel transistor operation and as the isolation region. This eliminates the need for separate isolation structures, reducing device complexity while maintaining reliability through proper electrical isolation achieved via the shared areas.
Solution Approach 2:
The common source/drain area performs multiple functions simultaneously: it acts as the electrical terminal for parallel transistor operation, provides signal routing, and serves as the isolation region between transistor groups. This multi-functionality reduces the overall number of structural elements needed, simplifying the device architecture while maintaining all necessary functions.
2Reliability
If transistors are connected in parallel to increase channel width, then transconductance is improved, but device area increases
Solution Approach 1:
Adjacent transistors share common source and/or drain areas, which eliminates the need for separate isolation structures between them. This merging of structural elements allows parallel transistor connections that increase effective channel width and transconductance while minimizing the additional area required, as the shared areas serve multiple transistors simultaneously.
3Area of stationary object
If transistors are closely arranged to reduce area, then area occupation is reduced, but dark current and noise increase
Solution Approach 1:
The common source/drain areas serve as both electrical connection points and isolation regions. By properly designing these shared areas, the structure provides adequate electrical isolation between adjacent transistors to prevent dark current leakage and reduce noise, while maintaining close physical arrangement to minimize overall device area.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances signal transfer speed and reduces dark current or noise by improving transconductance and minimizing RC delay, while also eliminating the need for separate isolation areas, thus improving overall image sensor performance.
Implementation Method 1
The pixel area may include a photodiode
Data Source
AI summary
An image sensor for securing an area of a photodiode includes a pixel area and a transistor area adjacent to the pixel area. The pixel area may include a photodiode and a floating diffusion area. The transistor area may include transistors extending along an edge of the pixel area. The transistors in the transistor area may include a reset transistor, one or more source follower transistors, and one or more selection transistors, and the reset transistor and one source follower transistor adjacent to the reset transistor may share a common drain area. The source follower transistors and the selection transistors may each share a common source area or a common drain area between two adjacent transistors thereof.