Image Sensor Input Transistor Leakage Reduction
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Solution Overview
Problem
Image sensors operating at low voltages suffer from significant gate leakage currents, leading to reduced sensitivity and image quality due to modern CMOS technology, resulting in artifacts like fixed pattern noise, dark signal non-uniformity, and photo response non-uniformity.
Innovation Solution
The input transistor is disabled during the photo detection time interval and biased to a reset voltage, preventing large current draw from the capacitive node, allowing the photo detection voltage to be determined solely by the photo current, thereby reducing gate leakage current and improving image quality.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If the input transistor is enabled during photo detection, then the front-end circuit can process signals, but gate leakage current significantly affects photo detection voltage and reduces image quality
Solution Approach 1:
The operation of the input transistor is segmented into two distinct phases: disabled during photo detection to prevent gate leakage current from affecting photo detection voltage, and enabled during readout to allow signal processing. This temporal segmentation resolves the contradiction by preventing the harmful effect during the critical measurement phase while maintaining functionality during processing phase.
Solution Approach 2:
The input transistor is disabled in advance during the photo detection time interval before signal processing occurs. This preliminary action ensures that gate leakage current does not contaminate the photo detection voltage, allowing accurate measurement to be established before the transistor is enabled for subsequent readout operations.
2Use of energy by moving object
If modern CMOS technology is used for low voltage operation, then power consumption is reduced, but gate leakage current increases and degrades image quality
Solution Approach 1:
The operational state of the input transistor is segmented such that it remains disabled during photo detection despite being part of a modern CMOS process. This allows the benefits of low-voltage operation and reduced power consumption to be realized while preventing gate leakage current from degrading measurement precision through temporal separation of functions.
3Ease of operation
If the input transistor draws current from the capacitive node, then the transistor can operate, but this current draw creates gate leakage current that causes image artifacts
Solution Approach 1:
The transistor operation is segmented in time: the input transistor is disabled during photo detection when no current draw is acceptable, and enabled during readout when current flow is necessary for signal processing. This segmentation eliminates gate leakage current and associated image artifacts during the critical photo detection phase while allowing transistor operation during the readout phase.
Solution Approach 2:
The harmful current draw function is extracted from the transistor's operation during photo detection by disabling the transistor, separating the necessary current flow function to a later time when it no longer interferes with photo detection. This extraction removes the harmful effect while preserving the transistor's operational capability for signal processing.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances image sensitivity and quality under low light conditions while maintaining low power consumption, reducing image artifacts and enabling satisfactory image acquisition.
Implementation Method 1
The photo detector circuit comprises a photosensitive device, such as, for example, a photodiode that provides a photo current in response to incident light
Data Source
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AI summary
In an image sensor, a photo detector circuit (305) applies a photo current to a capacitive node (312) during a photo detection time interval. A front-end circuit (306) comprises an input transistor (314) having a control node that is coupled to the capacitive node (312). A switchable biasing arrangement (301) puts the input transistor in a disabled state during the photo detection time interval. The input transistor is put in an enabled state after the photo detection time interval. This then causes the front-end circuit (306) to provide an output signal (309) that is representative of a voltage (308) on the capacitive node after the photo detection time interval.