Image Sensor Package Vertical Stacking for Signal Speed
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Solution Overview
Problem
Current packaging technologies for image sensors face limitations in signal communication speed between semiconductor chips, impairing the overall performance of image sensors.
Innovation Solution
An image sensor package design that includes a redistribution circuit structure, an image sensing chip, a top tier semiconductor chip, and conductive pillars and conductors aligned for direct electrical connection, with an encapsulant covering the components to enhance signal transmission efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If conventional packaging technology is used to integrate semiconductor chip into image sensor package, then the chip can be integrated into the package, but the signal communication speed between the semiconductor chip and the image sensing chip is limited
Solution Approach 1:
The patent transitions from conventional planar packaging to a three-dimensional stacked architecture where the image sensing chip and semiconductor chip are vertically arranged. The signal transmission path is optimized by aligning conductive pillars with contact pads in the vertical dimension, enabling direct electrical connection and significantly improving signal communication speed while managing packaging complexity through vertical integration.
Solution Approach 2:
The patent implements a nested structure where the semiconductor chip is positioned above the image sensing chip, with conductive pillars extending from the semiconductor chip's contact pads down to connect with corresponding pads on the image sensing chip. This nested arrangement allows compact integration while maintaining high-speed signal communication through direct vertical pathways.
2Reliability
If the semiconductor chip is integrated into the image sensor package, then the image sensor can achieve better performance, but the signal communication speed is limited which impairs overall performance
Solution Approach 1:
The patent replaces conventional mechanical wire bonding or trace routing with direct vertical electrical connection through conductive pillars. This substitution eliminates indirect signal paths and introduces direct copper-to-copper or conductive material connections, dramatically improving signal communication speed and ensuring reliable high-performance operation of the integrated image sensor package.
3Productivity
If conductive pillars are aligned with contact pads for direct electrical connection, then signal transmission efficiency is enhanced, but manufacturing precision requirements increase
Solution Approach 1:
The patent employs preliminary alignment actions during the manufacturing process, where the positions of conductive pillars are pre-determined based on the contact pad layout of the image sensing chip. This preliminary planning and positioning ensure that subsequent assembly steps can achieve the required alignment precision efficiently, maintaining high signal transmission efficiency while managing manufacturing complexity.
Data Source
AI summary
An image sensor package and a manufacturing method thereof are provided. The image sensor package includes a redistribution circuit structure; an image sensing chip disposed on the redistribution circuit structure and having a sensing surface, on which a sensing area and a first conductive pillar arranged in the periphery of the sensing area are disposed; a lid covering the sensing area; an encapsulant disposed on the redistribution circuit structure and encapsulating at least part of the image sensing chip and the cover; and a top tier semiconductor chip disposed above the image sensing chip and having an active surface on which a first conductor is disposed. The first conductor overlaps the image sensing chip in a direction perpendicular to the sensing surface. The first conductive pillar and the first conductor are aligned and bonded to each other to electrically connect the image sensing chip and the top tier semiconductor chip.