CMOS Image Sensor Reference Voltage Isolation for Low-Noise DAC Biasing

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Solution Overview

Problem

CMOS imaging System-on-Chip (iSoC) sensors face challenges in generating low noise reference voltages due to noise pickup and cross-talk, especially in complex integrated circuits with varying clocking frequencies, capacitive loads, and bandwidths, which affect image quality.

Innovation Solution

A system that generates a low noise bandgap voltage, filters it using a low pass filter, and distributes it to isolated domains where programmable digital to analog converters (DACs) create independent reference voltages, isolating them from switching noise and clock glitches, and buffers the outputs for adequate impedance and signal swing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If conventional voltage generation techniques are used in complex iSoCs, then device integration is achieved, but noise pickup and cross-talk increase

Engineering Contradiction:
Improveintegration complexityVSAvoidnoise pickup
Core Design Contradiction:
Device complexityVSObject-affected harmful factors

Solution Approach 1:

The patent divides the iSoC into multiple isolated domains (analog domain, digital domain, mixed-signal domain) with separate reference voltage generators for each domain. This segmentation prevents noise pickup and cross-talk by isolating sensitive analog circuits from noisy digital circuits, while maintaining comprehensive integration across the entire chip.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces isolated reference voltage domains as intermediary layers between power sources and functional circuits. These intermediary domains provide clean, regulated reference voltages to various circuits while blocking noise propagation, effectively mediating between the integrated but noisy digital circuits and sensitive analog circuits.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Adaptability or versatility

If comprehensive integration is achieved in iSoC, then functionality increases, but cross-talk between reference voltage components increases

Engineering Contradiction:
ImprovefunctionalityVSAvoidcross-talk
Core Design Contradiction:
Adaptability or versatilityVSObject-generated harmful factors

Solution Approach 1:

The patent segments the integrated circuit into multiple isolated reference voltage domains, each serving specific functional blocks. This allows comprehensive functionality within each domain while preventing cross-talk between domains through electrical isolation, enabling high versatility without noise interference.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Each isolated domain is optimized with locally-appropriate reference voltage generation characteristics tailored to its specific functional requirements. Analog domains receive low-noise references, digital domains receive robust references, and mixed-signal domains receive conditioned references, allowing each region to have the quality needed for its function while maintaining overall system integration.

Inventive Principle:
Principle #3Local quality

3Productivity

If multiple clocking frequencies are used, then performance is improved, but noise isolation becomes difficult

Engineering Contradiction:
ImproveperformanceVSAvoidnoise isolation difficulty
Core Design Contradiction:
ProductivityVSObject-affected harmful factors

Solution Approach 1:

The patent segments circuits operating at different clocking frequencies into separate isolated domains, each with its own reference voltage generator optimized for that frequency range. This allows high-performance multi-frequency operation while preventing noise from high-frequency digital circuits from interfering with low-frequency analog circuits through domain isolation.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively mitigates cross-talk and noise, ensuring low noise reference voltages are provided to CMOS iSoC sensors, improving image quality by isolating high-frequency and low-frequency circuits and reducing kick-back noise.

Implementation Method 1

The primary reference voltage is filtered via a low pass filter

Methodology Applied
Scientific EffectLow pass filtering: Filter (electronic)

Data Source

PatentEP2215833B1Reference voltage generation in imaging sensors
Publication Date: 2023.01.04 JVC KENWOOD CORP
  • EP2215833B1 patent drawingFigure 1
  • EP2215833B1 patent drawingFigure 2
  • EP2215833B1 patent drawingFigure 3

AI summary

The claimed subject matter provides systems and/or methods that facilitate generating and/or maintaining low noise reference voltages for CMOS imaging System-on-Chip (iSoC) sensors. A primary reference voltage can be generated utilizing a low noise bandgap. Further, the primary reference voltage can be filtered via a low pass filter. The filtered, primary reference voltage can thereafter be distributed to a plurality of isolated domains. Each of the isolated domains can generate an independent set of reference voltages based upon the filtered, primary reference voltage. Moreover, subsets of these reference voltages can be employed by programmable digital to analog converters (DACs). Each of the reference voltages can be isolated from switching noise and/or clock glitches generated within each domain. Further, each DAC output can be buffered to have adequately low impedance with appropriate drive capability and requisite signal swing.