Back-Illuminated Image Sensor Wafer Bonding for Low-Aspect Vias
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Solution Overview
Problem
The existing methods for manufacturing semiconductor devices, such as solid-state imaging devices, face challenges in forming high-aspect ratio connection holes in substrates, which are costly and complex, limiting the choice of connection conductor materials and increasing production costs, while also requiring specialized processing steps.
Innovation Solution
A method involving the bonding of half-finished semiconductor wafers with pixel arrays and logic circuits, where one wafer serves as a supporting substrate for the other, allowing for optimal formation and electrical connection of these components, reducing the aspect ratio of connection holes and enabling the use of various conductor materials, including those with lower coatability like copper.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If high-aspect ratio connection holes are formed in substrates using existing methods, then electrical connection between pixel arrays and logic circuits is achieved, but manufacturing complexity and cost increase significantly
Solution Approach 1:
The substrate is divided into two separate half-finished semiconductor wafers that are processed independently and then bonded together. This segmentation allows connection holes to be formed in thinner substrates with lower aspect ratios, reducing manufacturing complexity while maintaining electrical connection reliability
Solution Approach 2:
The problem is solved by transitioning from a single-substrate vertical connection approach to a multi-layer bonded wafer approach. Connection holes are formed in separate thinner layers before bonding, effectively reducing the aspect ratio by distributing the connection path across multiple dimensional layers
2Reliability
If high-aspect ratio connection holes are formed using existing methods, then electrical connection is established, but production cost increases due to limited conductor material choices
Solution Approach 1:
Dividing the substrate into bonded half-finished wafers creates shallower connection holes with lower aspect ratios, enabling the use of copper and other cost-effective conductor materials that have lower coatability and cannot fill high-aspect ratio holes effectively
Solution Approach 2:
The aspect ratio parameter of connection holes is changed from high to low through the bonded wafer structure, which directly enables the use of diverse conductor materials including copper, aluminum, and tungsten based on performance and cost requirements rather than being constrained by filling capability
3Ease of manufacture
If bonding of half-finished semiconductor wafers is performed, then manufacturing process is simplified and production cost is reduced, but additional bonding process steps are required
Solution Approach 1:
Two separately processed half-finished wafers are merged through bonding to create the final device. While this adds a bonding step, it enables parallel processing of multiple wafers and simplifies subsequent manufacturing steps by working with thinner substrates and lower aspect ratio connection holes
4Productivity
If half-finished semiconductor wafers are bonded together, then mass production efficiency is improved, but precision alignment during bonding is required
Solution Approach 1:
Alignment marks and positioning structures are prepared in advance on the half-finished wafers before bonding. This preliminary action ensures precise alignment during the bonding process, enabling mass production while maintaining the required manufacturing precision
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach facilitates the mass production of high-performance semiconductor devices with reduced production costs by simplifying the manufacturing process, allowing for efficient formation of pixel arrays and logic circuits under optimal conditions and enabling the use of diverse conductor materials.
Implementation Method 1
bonding a first semiconductor wafer with a pixel array in a half-finished product state and a second semiconductor wafer with a logic circuit in a half-finished product state together
Data Source
AI summary
A semiconductor device is provided as a back-illuminated solid-state imaging device. The device is manufactured by bonding a first semiconductor wafer with a pixel array in a half-finished product state and a second semiconductor wafer with a logic circuit in a half-finished product state together, making the first semiconductor wafer into a thin film, electrically connecting the pixel array and the logic circuit, making the pixel array and the logic circuit into a finished product state, and dividing the first semiconductor wafer and the second semiconductor being bonded together into microchips.