Image Signal Control Frame CRC for Display Format Verification

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Solution Overview

Problem

Existing image transmission systems fail to verify the conformity of image data to the format standard, leading to potential display issues due to signal damage or non-compliance, which can result in incomplete or distorted image rendering.

Innovation Solution

A method is introduced to transmit and receive image data using a control field frame that includes Average Picture Level (APL) data and an error detection code, such as a Cyclic Redundancy Check (CRC) code, during the vertical blanking period of a serial interface system, ensuring error detection and correction.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If image data is transmitted without error detection code, then transmission speed is maintained, but reliability of image data transmission deteriorates

Engineering Contradiction:
Improvereliability of image data transmissionVSAvoidcomplexity of transmission protocol
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The error detection code is calculated and attached to the APL data before transmission during the vertical blanking period. This preliminary action ensures that error detection capability is built into the transmission process itself, resolving the contradiction by proactively preparing error detection mechanisms without requiring complex post-transmission verification systems.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The error detection code acts as an intermediary element between the transmitted APL data and the receiving device. It provides a simple yet effective verification mechanism that enhances reliability without requiring complex communication protocols or additional hardware, thus resolving the contradiction between reliability and complexity.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Manufacturing precision

If APL data is transmitted during vertical blanking period with error detection, then image display quality is maintained, but transmission time is reduced

Engineering Contradiction:
Improveprecision of image displayVSAvoidtime for data transmission
Core Design Contradiction:
Manufacturing precisionVSLoss of time

Solution Approach 1:

The APL data and error detection code are prepared and transmitted during the vertical blanking period, which is a time window that would otherwise be unused for active display. This preliminary action ensures that the active display period is not extended, maintaining precise timing while still achieving reliable data transmission.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The vertical blanking period serves as a cushioning time window that absorbs the transmission of APL data and error codes without affecting the active display timing. By utilizing this pre-existing time buffer, the system maintains display precision while accommodating the additional verification data transmission.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

Data Source

PatentUS12505010B2Method of transmitting and receiving image signals and image processing device for implementing the same
Publication Date: 2025.12.23 LX SEMICON CO LTD
  • US12505010B2 patent drawing
  • US12505010B2 patent drawing
  • US12505010B2 patent drawing

AI summary

Disclosed are a method of transmitting and receiving image signals and an image processing device for implementing the same, by which an error detection code for verification of image related data can be provided in transmitting the image related data to a receiving side from a transmitting side. The disclosure includes generating a control field frame including Average Picture Level (APL) data of image data and an error detection code for the APL data, transmitting the generated control field frame in a vertical blanking period according to a serial interface system, and transmitting pixel data of the image data in a vertical non-blanking period according to the serial interface system.