Image Stitching Circuit Using Pyramid Reuse to Cut Memory Bandwidth
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Solution Overview
Problem
Existing image stitching operations redundantly calculate and store data due to overlapping visible areas of adjacent image tiles, leading to reduced performance in image processing devices.
Innovation Solution
An image processing circuit and method that optimizes the image stitching process by generating Gaussian and Laplacian pyramids for adjacent image slices, reducing redundant calculations and memory bandwidth requirements through strategic storage and retrieval of pixel rows.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the image stitching operation processes adjacent image tiles independently with overlapping visible areas, then the image processing can handle multiple tiles simultaneously, but redundant calculations and data storage occur reducing processing performance
Solution Approach 1:
The patent applies preliminary action by pre-calculating and storing the Gaussian pyramid for the first image tile before processing the second image tile. The memory control circuit stores the Gaussian pyramid of the first image tile in advance, so when processing the second image tile, the Laplacian pyramid calculation circuit can directly read the pre-stored Gaussian pyramid data, avoiding redundant calculations and improving processing efficiency
Solution Approach 2:
The patent uses copying by storing the Gaussian pyramid data of the first image tile in memory as a copy that can be reused. Instead of recalculating the Gaussian pyramid for the second image tile from scratch, the system copies and reuses the pre-computed Gaussian pyramid data, significantly reducing computational workload and energy consumption
2Reliability
If the Gaussian pyramid is stored completely in memory for each image tile, then data availability is maximized, but memory capacity requirements increase
Solution Approach 1:
The patent applies the extraction principle by selectively storing only the necessary part of the Gaussian pyramid (the first image tile's Gaussian pyramid) in the memory control circuit's buffer, rather than storing complete Gaussian pyramids for all image tiles. This extraction of essential data maintains data availability for the current processing task while significantly reducing memory capacity requirements
Solution Approach 2:
The patent uses segmentation by dividing the memory storage into two parts: the main memory stores the original image data, while the memory control circuit's buffer stores only the necessary Gaussian pyramid data for current processing. This segmentation of storage functions allows the system to maintain reliability for data availability while reducing overall memory capacity requirements
3Reliability
If all pixel rows of the Gaussian pyramid are stored in memory, then complete data is available for processing, but memory bandwidth requirements increase
Solution Approach 1:
The patent applies partial action by storing only the necessary portion of the Gaussian pyramid (the first image tile's Gaussian pyramid) in the memory control circuit's buffer rather than all pixel rows of all image tiles. This partial storage maintains data completeness for the current processing task while significantly reducing memory bandwidth requirements
Data Source
AI summary
An image processing circuit for performing an image stitching operation is coupled to an external memory storing an original image containing adjacent first and second slices, and includes a memory, a Gaussian pyramid calculation circuit, and a Laplacian pyramid calculation circuit. The first slice contains a first image tile. The Gaussian pyramid calculation circuit reads a portion of the original image from the external memory, generates a Gaussian pyramid for the first image tile, with the Gaussian pyramid containing N image layers, stores N−1 rows of pixels into the memory, with the N−1 rows of pixels being respectively the last row of N−1 image layers among the N image layers, and stores the Gaussian pyramid into the memory. The Laplacian pyramid calculation circuit reads the N−1 rows of pixels from the memory when generating a corresponding Laplacian pyramid for a second image tile of the second slice.