Solid-State Imaging Amplifier Limiting Circuit for Darkening Reduction
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Solution Overview
Problem
In MOS-type solid-state imaging apparatuses, high luminance darkening occurs due to fluctuations in the N signal caused by strong light, leading to reduced accuracy in correlated double sampling (CDS) operations, especially when the N signal holding circuit and S signal holding circuit have different configurations and charge injection differences.
Innovation Solution
A solid-state imaging apparatus with a pixel unit, an amplifier unit, and a limiting circuit where the pixel unit outputs noise signals under reset and non-reset states, and the limiting circuit, specifically a PMOS clipping transistor, limits the output signal level during the reset state to prevent darkening by maintaining symmetry between the S and N signal paths.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If a transistor is used to limit the N signal level in the holding capacitor, then darkening is prevented, but the elimination accuracy of CDS deteriorates due to asymmetric circuit configurations
Solution Approach 1:
The invention intentionally introduces asymmetry by adding a clipping transistor only to the N signal path, not the S signal path. This asymmetric modification is necessary to prevent darkening while maintaining CDS accuracy, as the N signal requires level limiting to prevent saturation effects that cause darkening.
Solution Approach 2:
The clipping transistor is applied locally only where needed - in the N signal holding circuit path - rather than modifying both S and N signal paths uniformly. This localized modification prevents darkening in the N signal while preserving the symmetry and accuracy of the S signal path.
2Manufacturing precision
If the N signal is limited by changing the high level voltage of the control electrode, then the N signal level is controlled, but voltage amplitudes of control electrodes differ causing CDS elimination accuracy to deteriorate
Solution Approach 1:
The clipping transistor changes the voltage parameters of the N signal path by introducing a controlled voltage clamp. The transistor's gate voltage parameters are specifically adjusted to limit the N signal to an appropriate range without affecting the S signal path parameters, thereby maintaining symmetry.
Solution Approach 2:
The clipping transistor acts as an intermediary element in the N signal path, mediating between the amplifier output and the holding capacitor. It provides voltage level control through its channel conduction characteristics, allowing the N signal to be limited without directly modifying the S signal path or control electrode voltages.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the accuracy of CDS operations by maintaining symmetry between the S and N signal paths, reducing darkening effects, and minimizing the influence on small signal characteristics and response characteristics, while operating without increased power consumption.
Implementation Method 1
a photoelectric conversion unit configured to generate a signal by a photoelectric conversion
Data Source
AI summary
A solid-state imaging apparatus and an imaging system which can reduce the occurrence of darkening and decrease deterioration in CDS performance are provided. The solid-state imaging apparatus has: a pixel unit including a photoelectric conversion unit for generating a signal by a photoelectric conversion; an amplifier unit for amplifying the signal generated by the photoelectric conversion unit; and a limiting circuit for limiting a level of an output signal from the amplifier unit. The pixel unit outputs a noise signal under a reset state during a first period and outputs a pixel signal under a non-reset state during a second period. The limiting circuit limits the level of the output signal from the amplifier unit in the first period, lower than the level of the output signal from the amplifier unit in the second period.


