Imaging Apparatus 3D Stacked Comparison Circuit
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In imaging apparatuses, the sharing of input transistors among pixels increases wiring length, leading to prolonged settlement times and decreased readout speed, while large circuit scales per pixel on the upper substrate limit the area available for photodiodes and the number of pixels that can be secured.
Innovation Solution
The imaging apparatus includes a first and second photoelectric conversion unit, with a comparison unit that utilizes a differential input circuit with p-channel metal-oxide semiconductor field effect transistors, where the input transistors are shared between pixels, and a current control transistor is strategically placed on a second substrate to minimize the number of transistors per pixel, reducing wiring capacitance and allowing for high-speed readout.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If input transistors are shared among multiple pixels, then the circuit scale per pixel is reduced, but the wiring length increases causing prolonged settlement time and decreased readout speed
Solution Approach 1:
The patent applies 3D stacking technology to place the comparison circuit on a different substrate layer (second substrate) than the pixel circuit (first substrate). This spatial separation in the vertical dimension reduces the horizontal wiring length between pixels and comparison circuits, thereby decreasing wiring capacitance and settlement time while maintaining transistor sharing to reduce per-pixel circuit scale.
2Quantity of substance
If more pixels are arranged on the imaging substrate, then the imaging resolution increases, but the area available for photodiodes decreases
Solution Approach 1:
By moving the comparison circuit to a second substrate through 3D stacking, the patent frees up horizontal space on the first substrate where photodiodes can be enlarged. This vertical arrangement allows more pixels to be packed on the imaging substrate while maintaining adequate photodiode area for each pixel.
3Speed
If the circuit scale per pixel is increased to provide dedicated readout circuits, then the readout speed improves, but the area available for photodiodes and number of pixels decreases
Solution Approach 1:
The patent segments the imaging system into two functional substrates: the first substrate contains pixel circuits for photoelectric conversion, while the second substrate contains comparison circuits for readout. This segmentation allows optimization of each substrate's function - sufficient photodiode area on the first substrate and adequate comparison circuit resources on the second substrate - achieving high readout speed without compromising pixel area.
Solution Approach 2:
The 3D stacking architecture separates pixel and comparison circuits onto different vertical layers, enabling parallel operation of multiple pixels simultaneously without waiting for sequential readout. This resolves the contradiction by providing dedicated readout capability (improving speed) while maintaining compact per-pixel footprint (preserving photodiode area).
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration reduces settlement time, enables high-speed readout, and increases the area available for photodiodes, allowing for a higher number of pixels and improved imaging performance.
Implementation Method 1
a photodiode (hereinafter, referred to as PD) 11a that converts incident light into charge
Data Source
AI summary
An imaging apparatus includes a first photoelectric conversion unit configured to convert light into charge, a second photoelectric conversion unit configured to convert light into charge, and a comparison unit. The comparison unit includes a first transistor and a second transistor. The first transistor receives a signal that is based on the charge converted by the first photoelectric conversion unit. The second transistor receives a signal that is based on the charge converted by the second photoelectric conversion unit.


