Imaging Device Chip Stacking for Noise Isolation

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Solution Overview

Problem

Existing imaging devices with stacked differential stages and AD converters face challenges in minimizing noise interference, particularly from the ramp signal generator, which affects the signal-to-noise ratio and device performance.

Innovation Solution

The imaging device is designed with the photoelectric converter and the first part of the differential stage on one chip and the second part of the differential stage on another chip, with the ramp signal generator located on a separate chip, increasing the distance between noise sources and sensitive analog circuits to reduce noise interference.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If the ramp signal generator is integrated on the same chip as the photoelectric converter and differential stage, then device complexity is reduced, but noise interference increases and signal-to-noise ratio deteriorates

Engineering Contradiction:
Improvedevice complexityVSAvoidnoise interference
Core Design Contradiction:
Device complexityVSObject-affected harmful factors

Solution Approach 1:

The imaging device is divided into three separate chips: first chip containing photoelectric converters, second chip containing differential stages, and third chip containing ramp signal generators. This segmentation physically separates noise-generating components from sensitive components, resolving the contradiction between device complexity and noise interference.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The ramp signal generator, which is the primary noise source, is extracted from the same chip as the sensitive photoelectric converters and differential stages. By placing it on a separate third chip, the harmful noise is isolated from the signal path, improving signal-to-noise ratio while maintaining functional integration through chip stacking.

Inventive Principle:
Principle #2Taking out (Extraction)

2Area of stationary object

If the ramp signal generator is placed close to the photoelectric converter, then device area is reduced, but noise influence on signal accuracy increases

Engineering Contradiction:
Improvedevice areaVSAvoidsignal accuracy
Core Design Contradiction:
Area of stationary objectVSMeasurement precision

Solution Approach 1:

Instead of increasing horizontal distance on a single chip, the patent uses vertical stacking to separate components across three chips. The first chip (photoelectric converters), second chip (differential stages), and third chip (ramp signal generators) are stacked, increasing the vertical distance between noise sources and sensitive circuits while maintaining compact footprint.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration effectively suppresses noise influence from the ramp signal generator, improving the signal-to-noise ratio and enhancing the imaging device's performance by isolating noise sources, thereby improving signal accuracy and reducing noise impact on the imaging process.

Implementation Method 1

an imaging device having a photoelectric converter and an analog-to-digital (AD) converter that performs AD conversion on a signal from the photoelectric converter

Methodology Applied
Scientific EffectPhotoelectric conversion: Photoelectric Effect

Data Source

PatentUS11108985B2Imaging device, imaging system, and movable object
Publication Date: 2021.08.31 CANON KK
  • US11108985B2 patent drawing
  • US11108985B2 patent drawing
  • US11108985B2 patent drawing

AI summary

Provided is an imaging device including: a photoelectric converter; an AD converter unit including a differential stage; and a ramp signal generator. The photoelectric converter and a first part of the differential stage are arranged in a first chip, a second part of the differential stage is arranged in a second chip that is a different chip from the first chip and stacked on the first chip, and the ramp signal generator is arranged in a different chip from the first chip.