Solid-State Imaging Device Column Circuit Segmentation
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Solution Overview
Problem
CMOS solid-state imaging devices face issues with voltage drops due to wiring resistance in vertical signal lines, leading to signal level differences and image quality degradation, especially with increased pixel current and miniaturization, which affects the operation range of CDS and image quality.
Innovation Solution
The implementation of a solid-state imaging device with column circuits connected to the vertical signal line from the inside of the pixel unit, rather than from the end, reduces voltage drop by halving the maximal length of the vertical signal line and ensuring symmetry in shading, thereby improving image quality.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If column circuits are provided to each pixel column at the end of the pixel unit, then signal collection is simplified, but voltage drop increases due to long vertical signal lines
Solution Approach 1:
The pixel unit is divided into multiple pixel sections, each with its own column circuit. This segmentation reduces the length of vertical signal lines from spanning the entire pixel unit height to only the height of individual pixel sections, thereby reducing voltage drop while maintaining organized signal collection
Solution Approach 2:
Column circuits are distributed across multiple locations in the pixel unit rather than concentrated at one end. This spatial redistribution in another dimension (from single-point collection to multi-point collection) reduces signal line length and voltage drop
2Manufacturing precision
If pixel miniaturization is applied to increase pixel density, then resolution improves, but wiring resistance increases leading to greater voltage drop
Solution Approach 1:
By segmenting the pixel unit into smaller pixel sections with distributed column circuits, the patent compensates for increased wiring resistance caused by miniaturization. The shorter signal lines within each pixel section reduce the cumulative resistance effect despite thinner wirings
Solution Approach 2:
Each pixel section is designed with local column circuits tailored to its specific size and signal characteristics. This local optimization ensures that each miniaturized pixel group has adequate signal collection capability without suffering from excessive voltage drop
3Speed
If pixel current is increased to improve readout speed, then imaging speed improves, but voltage drop increases affecting CDS operation range
Solution Approach 1:
Distributing column circuits across multiple pixel sections reduces the resistance of vertical signal lines, allowing higher pixel currents to be used for faster readout without exceeding voltage drop limits that would compromise CDS operation
4Loss of energy
If column circuits are provided to each pixel section instead of each pixel column, then voltage drop is reduced, but circuit size increases
Solution Approach 1:
The patent segments the pixel unit into multiple pixel sections, each containing column circuits. This segmentation reduces voltage drop by shortening signal lines while the modular design ensures efficient space utilization, preventing excessive overall circuit area increase
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration decreases voltage drop and shading caused by wiring resistance, enhancing image quality and ensuring a wider voltage margin for the pixel circuit operation, allowing for better image capture and processing.
Implementation Method 1
a pixel circuit unit 102 having a photodiode 102a for converting light into electric charge
Data Source
AI summary
A solid-state imaging device includes a pixel unit in which a plurality of pixels converting physical quantities into electric signals are arranged in a two-dimensional shape, a vertical signal line for reading signals from the pixels, and column circuits arranged corresponding to columns of the pixel unit and collecting the signals from the vertical signal line at the inside of the pixel unit.