Solid-State Imaging Device Comparator for Dynamic Range
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
CMOS image sensors face limitations in achieving a broader dynamic range and higher frame rate due to issues with power consumption, dark current influence, and noise, particularly in utilizing overflow charges in real-time, which affects image quality and pixel region expansion.
Innovation Solution
A solid-state imaging device with pixels that include a photoelectric conversion element, a transfer element, an output buffer, and a comparator performing delayed AD conversion processing for overflow and accumulated charges, reducing power consumption and dark current influence while expanding dynamic range and frame rate.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If an ADC including a comparator is arranged in each pixel to enable global shutter operation, then global shutter function is achieved, but charges overflowing from photodiodes cannot be utilized in real time, limiting dynamic range and frame rate
Solution Approach 1:
The patent segments the pixel array into multiple banks, each with its own ADC and comparator. This allows different banks to operate at different stages of the imaging cycle, enabling overflow charge utilization while maintaining global shutter capability. The segmentation enables parallel processing of different charge types across multiple banks.
Solution Approach 2:
The patent implements preliminary action by having the comparator continuously monitor and compare overflow charges against a reference voltage during the integration period, before the main readout operation. This preliminary comparison enables real-time utilization of overflow charges and allows the system to capture both overflow and non-overflow charges effectively.
2Adaptability or versatility
If conventional digital pixel sensors are used to realize global shutter, then global shutter function is achieved, but power consumption increases and dark current influence cannot be suppressed
Solution Approach 1:
The patent employs periodic action by controlling the comparator to operate in periodic cycles rather than continuously. The comparator is activated at specific intervals to compare overflow charges, allowing bias currents to be supplied periodically rather than continuously. This reduces power consumption while maintaining the ability to suppress dark current influence through timed comparisons.
3Adaptability or versatility
If ADC is arranged in each pixel to expand dynamic range, then dynamic range is improved, but effective pixel region cannot be expanded to maximum limit
Solution Approach 1:
The patent merges the ADC functionality into a shared resource that serves multiple pixels within a bank, rather than dedicating a full ADC to each pixel. The comparator is shared across pixels in the same bank, allowing multiple pixels to utilize the same ADC resources. This merging approach expands the effective pixel region while maintaining enhanced dynamic range capabilities through the comparator-based overflow detection.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively lowers power consumption, suppresses dark current influence, and enhances image quality by enabling broader dynamic range and higher frame rates, while expanding the effective pixel region and reducing noise.
Implementation Method 1
a photoelectric conversion element which accumulates a charge generated by photoelectric conversion
Data Source
AI summary
A comparator in an AD conversion part performs, under the control of reading part, a first comparison processing outputting a digitized first comparison result signal with respect to a voltage signal corresponding to an overflow charge overflowing from a PD1 to an FD1 in an integration period and a second comparison processing outputting a digitized second comparison result signal with respect to a voltage signal corresponding to a accumulated charge of the PD1 transferred to the FD1 in a transfer period after the integration period and, in the first comparison processing, starts an AD conversion processing comparing the voltage signal of the output buffer part and the reference voltage and outputting the digitized comparison result signal with a delay from the starting time of the first comparison processing. The comparator lowers a power consumption and suppresses an influence of a dark current of the FD and deterioration of an image.