Imaging Device Control Signal for Viewfinder Delay Reduction

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Solution Overview

Problem

In mirror-less SLR digital cameras, there is a significant delay from image capture in the image sensor to displaying on the electronic viewfinder, making it difficult to follow moving subjects and capture intended still images, especially with fast-moving subjects, due to complex circuit configurations required to synchronize horizontal scanning periods.

Innovation Solution

An imaging device with an imaging element, an image signal output unit, and a control signal output unit that indicates whether the image signal is valid or invalid in synchronization with the horizontal synchronization signal, allowing for determination of valid or invalid image signals and adjusting display timing accordingly, thereby simplifying the circuit configuration.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of time

If the horizontal scanning period is adjusted to shorten delay time, then the delay from imaging to displaying is reduced, but the circuit configuration becomes complicated

Engineering Contradiction:
Improvedelay timeVSAvoidcircuit configuration
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The patent divides the image signal into valid and invalid portions using a control signal. The valid image signal corresponds to the active period where actual image data is present, while the invalid image signal corresponds to periods including front porch, back porch, and synchronization intervals. This segmentation allows the system to process and display only relevant image data without requiring complex circuit adjustments.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent generates the control signal in advance based on the horizontal synchronization signal timing. By determining the valid and invalid periods beforehand using the horizontally synchronized control signal, the system can prepare display timing without requiring real-time complex circuit adjustments during the scanning process.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If the horizontal scanning period is extended to adjust timing, then synchronization is improved, but the device complexity increases

Engineering Contradiction:
ImprovesynchronizationVSAvoidcircuit configuration
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent introduces a control signal as an intermediary element that mediates between the horizontal synchronization signal and the image signal processing. This control signal carries timing information that enables synchronization without requiring direct complex circuit modifications in the display driving circuitry. The control signal acts as a simple mediator that translates synchronization requirements into valid/invalid image signal markers.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If complex circuit configuration is used to follow horizontal synchronization signal variation, then display synchronization is achieved, but the circuit becomes complicated

Engineering Contradiction:
Improvedisplay synchronizationVSAvoidcircuit configuration
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent creates a simplified copy of the synchronization information by embedding valid/invalid timing data into the control signal based on the horizontal synchronization signal. Instead of requiring the display circuit to directly track and respond to variations in the horizontal synchronization signal, the system creates a simplified representation (control signal) that contains all necessary timing information, enabling synchronization with minimal circuit complexity.

Inventive Principle:
Principle #26Copying

Data Source

PatentUS10044912B2Imaging device and image processing device for outputting image signal to be displayed, and display control device and imaging display apparatus for displaying image signal
Publication Date: 2018.08.07 SEIKO EPSON CORP
  • US10044912B2 patent drawing
  • US10044912B2 patent drawing
  • US10044912B2 patent drawing

AI summary

A short delay time from imaging of an imaging element to displaying on a view finder is realized using a simple circuit configuration. In a live view mode, an image processing circuit performs image processing on imaging data from an image sensor, and generates image data of a display image. When processing for one line ends, progress information is output. When the image data of the display image is able to be output in synchronization with a second horizontal synchronization signal, a timing generator causes a data enable signal to be active, and supplies the image data to a data input unit according to this progress information on the other hand, when the image data is unable to be output, the timing generator causes the data enable signal to be inactive and supplies dummy data to the data input unit.