Solid-State Imaging Counter Reset for Ramp ADC Data Integrity

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Solution Overview

Problem

In solid-state imaging apparatuses with ramp-type column ADCs, large potential differences between ramp and pixel signals can lead to incomplete comparison processing within the AD conversion period, resulting in abnormal images due to data not being written in storage units, and existing solutions like level fixing circuits increase chip area.

Innovation Solution

A solid-state imaging apparatus with a matrix of pixels, read-out circuits, comparison units, counters, storage units, and reset units that compare signals with a time-varying reference signal, count elapsed time, and reset count values to prevent incomplete data storage, without the need for additional level fixing circuits.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a level fixing circuit is added to suppress incomplete comparison processing, then image quality is improved, but chip area increases

Engineering Contradiction:
Improveimage qualityVSAvoidchip area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent extracts the level fixing function from a separate circuit and integrates it into the comparison unit through shared use of the reference signal. The comparison unit directly uses the reference signal for both comparison operations without requiring a dedicated level fixing circuit, thus eliminating the need for additional circuitry while maintaining image quality.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The reference signal is used universally across multiple functions: it serves as the comparison reference for pixel signals and also as the level reference for the level fixing operation. This multi-functional use of the reference signal eliminates the need for separate level fixing circuits, reducing chip area while ensuring reliable AD conversion.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Device complexity

If a common counter is used to count elapsed time, then device complexity is reduced, but substrate voltage variations increase due to transient currents

Engineering Contradiction:
Improvedevice complexityVSAvoidsubstrate voltage variations
Core Design Contradiction:
Device complexityVSObject-generated harmful factors

Solution Approach 1:

The patent divides the counter into individual counter units for each column rather than using a single common counter. This segmentation allows each column's AD conversion to be counted independently, reducing the simultaneous switching transient currents that would otherwise cause substrate voltage variations, while maintaining relatively simple device complexity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Each column is equipped with its own counter unit that operates independently, allowing local counting operations without affecting other columns. This local化处理 reduces the impact of transient currents on the overall substrate voltage, as each counter's switching activity is isolated to its respective column circuit.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration ensures complete data storage and prevents abnormal image output by resetting count values, reducing transient currents and substrate voltage variations, thus maintaining image quality without increasing chip area.

Implementation Method 1

a photodiode 101 that performs photoelectric conversion

Methodology Applied
Scientific EffectPhotoelectric conversion: Photoelectric Effect

Data Source

PatentUS9307174B2Solid-state imaging apparatus using counter to count a clock signal at start of change in level of a reference signal
Publication Date: 2016.04.05 CANON KK
  • US9307174B2 patent drawing
  • US9307174B2 patent drawing
  • US9307174B2 patent drawing

AI summary

A solid-state imaging apparatus includes a plurality of pixels arrayed in a matrix, and configured to generate signals by photoelectric conversion; a plurality of read-out circuits disposed on each column of the plurality of pixels arrayed in a matrix pattern, and configured to read out the signals from the plurality of pixels; a plurality of comparison units configured to compare the signals output from the plurality of read-out circuits with a reference signal whose level changes with time; a counter configured to count a clock signal after the level of the reference signal starts a change; a storage unit configured, when a magnitude relationship between the signals output from the plurality of the read-out circuits and the reference signal is reversed; and a reset unit configured to reset the count value stored in the storage unit.