Solid-State Imaging Device Charge Leakage Prevention
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Solution Overview
Problem
In solid-state imaging devices, charges generated at a deeper portion of the semiconductor substrate may not be effectively collected in the charge accumulation region, leading to erroneous signals and image degradation due to leakage into adjacent pixels.
Innovation Solution
The design includes a specific semiconductor region structure with a p-type semiconductor region under an n-type region, a lower impurity concentration n-type region, and a channel region, where the potential relationships between these regions prevent charge leakage to adjacent pixels, ensuring charges are collected in the intended pixel.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If a p-type semiconductor region is provided directly under an n-type semiconductor region forming a charge accumulation region, then the charge accumulation capacitance is increased, but charges generated at deeper portions may leak into adjacent pixels causing erroneous signals
Solution Approach 1:
The p-type semiconductor region is segmented by providing openings that divide it into multiple isolated regions. This segmentation prevents charges from leaking continuously into adjacent pixels while maintaining the charge accumulation capacitance in each pixel region.
Solution Approach 2:
The p-type semiconductor region is provided with different impurity concentrations in different areas (higher concentration in charge accumulation region, lower concentration in deeper portions). This local quality variation optimizes charge collection efficiency while preventing charge leakage to adjacent pixels.
2Quantity of substance
If openings are provided in the p-type semiconductor region to collect charges from deeper portions, then the saturation signal amount is increased without losing sensitivity, but the structure becomes more complex
Solution Approach 1:
Multiple semiconductor regions (n-type charge accumulation region, p-type isolation region, and lower impurity concentration n-type region) are merged into a integrated structure that simultaneously achieves charge collection from deep portions and prevents charge leakage, reducing the need for additional separate components.
3Reliability
If the potential relationship V6>V5>V4 is established between semiconductor regions, then charge leakage to adjacent pixels is prevented, but the control of potential distribution becomes more difficult
Solution Approach 1:
The impurity concentration parameter is changed in the p-type semiconductor region (higher concentration near charge accumulation region, lower concentration in deeper portions). This parameter variation automatically creates the desired potential distribution (V6>V5>V4) without requiring complex external control mechanisms.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively suppresses erroneous signals by ensuring that signal charges are collected in the intended pixel, thereby improving image quality by preventing charge leakage and contamination from adjacent pixels.
Implementation Method 1
a photoelectric conversion unit that generates charges by photoelectric conversion
Data Source
AI summary
A photoelectric conversion unit includes first, second, and third semiconductor regions having first, second, and first conductivity types, respectively. A fourth semiconductor region between the first and third semiconductor regions at the same depth as the second semiconductor region. A charge holding portion includes a fifth semiconductor region of the first conductivity type. A transfer transistor has a region between the first and fifth semiconductor regions as a channel portion. A pixel isolation portion includes a sixth semiconductor region of the second conductivity type between the third semiconductor regions of adjacent pixels. A relationship V6>V5>V4 is satisfied, where a potential of the fourth semiconductor region to charges is V4, a potential of a region having the highest potential to charges in the channel portion with the transfer transistor being in an off-state is V5, and a potential of the sixth semiconductor region to charges is V6.