Imaging Device Parallel Counter Time Code Generation
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Solution Overview
Problem
Existing imaging devices face challenges in performing high-speed operations while maintaining image quality, particularly in line sensors where pixel signals need to be converted efficiently.
Innovation Solution
The imaging device incorporates a clock signal generator, light-receiving pixels with comparison and latch circuits, gate circuits that control clock signals, and counters that generate time codes. This configuration allows for efficient high-speed operation by synchronizing clock signals and reference signals across multiple pixel groups.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If each pixel performs AD conversion independently, then conversion precision is improved, but operation speed deteriorates
Solution Approach 1:
The imaging device divides pixels into multiple pixel groups and assigns a dedicated counter to each group. Each counter independently generates time codes for its associated pixel group, enabling parallel operation. This segmentation allows multiple pixels to perform AD conversion simultaneously rather than sequentially, thereby improving operation speed while maintaining conversion precision through dedicated resources for each group.
Solution Approach 2:
The counter circuits pre-generate time codes based on clock signals before the AD conversion process begins. By preparing the time codes in advance and making them available to pixel groups, the system eliminates waiting time during conversion operations. This preliminary action enables pixels to immediately perform AD conversion without delay, significantly improving operation speed while preserving precision.
2Productivity
If high-speed operation is implemented, then productivity is improved, but image quality deteriorates due to shading
Solution Approach 1:
The invention provides each pixel group with dedicated counters and time code generation circuits, creating localized resources for each group. This local quality approach ensures that each pixel group has independent access to timing signals and conversion resources, eliminating bottlenecks that would otherwise cause shading artifacts. By distributing conversion capabilities locally across pixel groups rather than using shared resources, the system achieves high-speed operation without compromising image quality.
Solution Approach 2:
The system uses clock signals to synchronize the operation of all counters and pixel groups, creating a feedback mechanism that maintains temporal coherence across the entire imaging device. The clock signal ensures that time codes are generated and AD conversions occur in a coordinated manner, preventing timing mismatches that could lead to shading. This synchronized feedback control enables high-speed operation while maintaining uniform image quality across all pixels.
3Speed
If multiple pixel groups are processed simultaneously, then operation speed is improved, but device complexity increases
Solution Approach 1:
The invention uses identical counter circuits and time code generation logic for all pixel groups, making each counter multi-functional in processing different pixel groups at different times. Rather than designing unique conversion circuits for each pixel, the system employs universal counter modules that can serve any pixel group through parallel instantiation. This universality reduces design complexity while enabling simultaneous processing of multiple pixel groups, as the same proven circuit design is replicated rather than customized.
Solution Approach 2:
The system replicates the counter circuit design across multiple pixel groups, creating identical copies of the time code generation logic. Each pixel group receives a copy of the counter circuit that independently generates time codes based on the same clock signal. This copying approach simplifies the overall design by using a standardized template that can be instantiated multiple times, reducing the complexity of coordinating multiple different circuits while enabling parallel operation for high speed.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The described configuration enables the imaging device to perform high-speed operations without compromising image quality, reducing the likelihood of shading and ensuring accurate time code generation for efficient pixel signal conversion.
Implementation Method 1
a light-receiving circuit configured to generate a pixel signal corresponding to an amount of received light
Data Source
AI summary
An imaging device according to the present disclosure includes: a clock signal generator; a plurality of light-receiving pixels; a plurality of gate circuits; and a plurality of counters. The clock signal generator supplies a first clock signal to a clock signal path. The plurality of light-receiving pixels is provided side by side in the first direction and grouped into a plurality of pixel groups in the first direction. The plurality of light-receiving pixels each includes a light-receiving circuit, a comparison circuit, and a latch circuit. The comparison circuit performs a comparison operation on the basis of a pixel signal and a reference signal having a ramp waveform. The latch circuit latches a time code on the basis of a result of comparison. The plurality of gate circuits is each configured to output a signal in a clock signal path as a second clock signal. The plurality of gate circuits each controls, on the basis of a control signal, whether or not to output the second clock signal. The plurality of counters each generates the time code on the basis of the second clock signal supplied from the corresponding gate circuit and supplies the generated time code to two or more light-receiving pixels belonging to the corresponding pixel group.