Solid State Imaging Device Dark Current Suppression
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Solution Overview
Problem
MOS solid state imaging devices face issues with dark current production due to stress and misalignment in device isolation layers, leading to noise and performance variations, which hinder high-performance imaging and increase costs.
Innovation Solution
A solid state imaging device with a dark current suppression region of opposite conductivity type surrounding the device isolation region, combined with a self-aligned lower part of the isolation region and an insulating upper part, to prevent dark current and maintain charge accumulation, reducing noise and variations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a device isolation region is formed by STI with a trench filled with oxide film, then electrical isolation between elements is achieved, but dark current increases due to etching damage and stress concentration
Solution Approach 1:
The device isolation region is divided into two distinct parts: an upper part filled with oxide film for electrical isolation, and a lower part formed as a self-aligned trench without filling to avoid stress concentration. This segmentation allows each part to serve its specific function while minimizing dark current generation.
Solution Approach 2:
Different regions of the device isolation structure are given different properties: the upper part has high dielectric constant oxide film for isolation, while the lower part maintains the semiconductor substrate structure to avoid stress. This local differentiation optimizes both isolation performance and dark current suppression.
2Quantity of substance
If the device isolation region width is reduced to accommodate smaller pixel sizes, then more charges can be accumulated in the photodiode, but misalignment occurs due to repeated lithography processes
Solution Approach 1:
The lower part of the device isolation region is formed first as a self-aligned trench before the upper part is added. This preliminary formation establishes a precise reference structure that guides subsequent processing steps, ensuring accurate alignment even when the overall isolation width is reduced for smaller pixels.
Solution Approach 2:
The lower part of the device isolation region serves as a self-aligned mask and reference structure for forming the upper part. This self-service mechanism eliminates the need for separate lithography alignment steps, preventing misalignment while allowing reduced isolation width for compact pixel designs.
3Quantity of substance
If the device isolation region width is reduced to accommodate smaller pixel sizes, then more charges can be accumulated in the photodiode, but additional dark current is produced due to stress concentration at the upper edge
Solution Approach 1:
The device isolation region is segmented into an upper part that provides electrical isolation and a lower part that avoids stress concentration. By separating these functions into different vertical zones, the design enables reduced isolation width for compact pixels while preventing stress-induced dark current at the critical upper edge region.
Data Source
AI summary
A solid state imaging device includes: an imaging region formed in an upper part of a substrate made of silicon to have a photoelectric conversion portion, a charge accumulation region of the photoelectric conversion portion being of a first conductivity type; a device isolation region formed in at least a part of the substrate to surround the photoelectric conversion portion; and a MOS transistor formed on a part of the imaging region electrically isolated from the photoelectric conversion region by the device isolation region. The width of the device isolation region is smaller in its lower part than in its upper part, and the solid state imaging device further includes a dark current suppression region surrounding the device isolation region and being of a second conductivity type opposite to the first conductivity type.