Solid-state imaging device groove and guard ring for dicing chipping

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Solution Overview

Problem

In semiconductor devices employing three-dimensional mounting techniques, chipping occurs during dicing due to the presence of a thick semiconductor substrate, leading to product defects and yield degradation.

Innovation Solution

A solid-state imaging device is designed with a groove penetrating through the semiconductor substrate between the blade region and the solid-state imaging element, and a guard ring layer is formed in the wiring layer to prevent chipping propagation, with the guard ring positioned between the blade region and the groove to redirect chipping away from the imaging element.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Strength

If a thick semiconductor substrate is used in three-dimensional mounting technique, then bonding strength and structural stability are improved, but chipping occurs during dicing due to stress concentration at the interface between substrate and wiring layer

Engineering Contradiction:
Improvebonding strengthVSAvoidchipping
Core Design Contradiction:
StrengthVSObject-affected harmful factors

Solution Approach 1:

A groove structure is introduced as an intermediary element between the thick semiconductor substrate and the wiring layer. This groove penetrates through the substrate and acts as a stress relief channel, preventing stress concentration at the substrate-wiring interface during dicing operations, thereby eliminating chipping while preserving bonding strength

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The semiconductor substrate is segmented by introducing grooves that divide the continuous substrate structure into separated regions. These grooves create discrete stress zones that prevent crack propagation across the entire substrate-wiring interface, thereby preventing chipping during dicing

Inventive Principle:
Principle #1Segmentation

2Productivity

If dicing is performed on three-dimensionally mounted semiconductor devices, then individual chips are separated for packaging, but chipping propagates at the interface between substrate and wiring layer causing product defects

Engineering Contradiction:
Improvechip separation efficiencyVSAvoidproduct defect rate
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The harmful stress concentration zone is extracted by creating grooves that remove material from the substrate. These grooves extract the stress path that would otherwise propagate chipping to the wiring layer, allowing clean chip separation without defects

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The grooves convert the harmful stress concentration effect into a beneficial stress relief mechanism. By intentionally creating controlled voids in the substrate, the design transforms potential chipping pathways into protective features that guide stress away from critical interfaces

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Data Source

PatentUS8786055B2Solid-state imaging device, method for manufacturing solid-state imaging device, method for manufacturing solid-state imaging element, and semiconductor device
Publication Date: 2014.07.22 SONY GROUP CORP
  • US8786055B2 patent drawing
  • US8786055B2 patent drawing
  • US8786055B2 patent drawing

AI summary

A solid-state imaging device includes a semiconductor substrate configured to include a solid-state imaging element that is provided with a photoelectric conversion region, and a scribe line region that is provided along a periphery of the solid-state imaging element, a wiring layer that is formed to be layered on the semiconductor substrate, a support substrate that is formed to be layered on the wiring layer, and a groove that is provided between a blade region in the scribe line region and the solid-state imaging element, in the semiconductor substrate and penetrates through the semiconductor substrate.