Solid-State Imaging Device Element Isolation Noise Reduction
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Solution Overview
Problem
Conventional CMOS image sensors experience noise and crystalline defects due to trench formation in semiconductor substrates, leading to unnecessary electric charges and reduced image quality, as the element isolation structure used in peripheral circuits is not optimized for pixel formation regions, causing stress and thermal expansion issues.
Innovation Solution
A solid-state imaging device with a pixel formation region using a P-type element isolation region inside the semiconductor substrate and a convex-shaped element isolation layer projecting from the substrate, which separates transistors and reduces noise by allowing a wider N-type charge accumulation region under the element isolation layer, while the peripheral circuit formation region uses a traditional STI structure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a traditional STI element isolation structure is used in the pixel formation region, then transistor isolation is achieved, but noise and crystalline defects occur due to trench formation damage and stress
Solution Approach 1:
The patent applies different element isolation structures to different regions: the pixel formation region uses a convex-shaped element isolation layer with P-type semiconductor region that does not require trench formation, while the peripheral circuit region uses the traditional STI structure. This local differentiation resolves the contradiction by optimizing each region for its specific function, eliminating noise and leakage current in the pixel region while maintaining effective isolation in the peripheral circuit region.
Solution Approach 2:
The patent segments the semiconductor device into two distinct regions with different isolation structures: pixel formation region and peripheral circuit region. By dividing the device and applying appropriate isolation methods to each segment, the patent eliminates the harmful effects of trench formation in the pixel region while preserving the benefits of STI isolation in the peripheral circuit region.
2Quantity of substance
If the photoelectric conversion element extends deeper into the substrate, then charge accumulation capacity increases, but the element isolation structure interferes with the charge accumulation region
Solution Approach 1:
The convex-shaped element isolation layer is designed to project upward from the semiconductor substrate surface, creating a localized isolation structure that occupies minimal substrate volume. The P-type semiconductor region is positioned to isolate transistors while allowing the photoelectric conversion element to extend deeply into the substrate for charge accumulation without significant interference, thus resolving the contradiction between charge capacity and isolation interference.
3Ease of manufacture
If the same element isolation structure is used in both pixel and peripheral circuit regions, then manufacturing is simplified, but the pixel region experiences stress and thermal expansion issues
Solution Approach 1:
The patent implements region-specific isolation structures: the pixel formation region uses a convex-shaped element isolation layer formed by selective oxidation and epitaxial growth without trench formation, eliminating stress and thermal expansion issues. The peripheral circuit region uses the traditional STI structure for effective transistor isolation. This local differentiation maintains manufacturing feasibility while resolving the stability issues in the pixel region.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration reduces noise and leakage current, enhances image signal quality, and facilitates miniaturization by optimizing element isolation in the pixel formation region while maintaining high-speed operation and low power consumption in the peripheral circuit region.
Implementation Method 1
a first element isolation portion formed of an element isolation layer made of an insulation layer buried in the semiconductor substrate is formed in the peripheral circuit formation region and a second element isolation portion formed of an element isolation region made inside the semiconductor substrate and an element isolation layer projecting upward from the semiconductor substrate is formed in the pixel formation region
Implementation Method 2
a pixel formation region having a pixel made of a photoelectric conversion element
Data Source
AI summary
A solid-state imaging device with a semiconductor substrate; a pixel formation region in the substrate and including a pixel made of a photoelectric conversion element; and an element isolation portion in the substrate and including an element isolation insulating layer and an impurity element isolation region. The element isolation insulating layer is positioned in a surface of the substrate. The impurity element isolation region is positioned under the element isolation insulating layer and within the substrate. The impurity element isolation region has at least a portion with a width that is narrower than that of the element isolation insulating layer. The photoelectric conversion element extends to a position under the element isolation insulating layer of the element isolation portion.