Solid-state imaging device parallel readout charge accumulation circuits
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Solution Overview
Problem
Existing solid-state imaging devices face challenges in simultaneously achieving high frame rates and full resolution, particularly in capturing moving images and live view images, due to the occupation of photoelectric conversion units and charge holding units during signal reading, which limits the ability to periodically read pixel signals at full resolution.
Innovation Solution
A solid-state imaging device with multiple charge accumulation circuits that allow for the transfer and averaging of signal charges across pixels, enabling the simultaneous output of full-resolution and reduced-resolution pixel signals using separate charge accumulation circuits and inter-substrate connections, allowing for independent readout of signal voltages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If pixel signals are read sequentially for each row in a general CMOS type solid-state imaging device, then the photoelectric conversion units and charge holding units can be occupied for full resolution imaging, but the frame rate for reduced-resolution imaging (such as moving images or live view) cannot be increased
Solution Approach 1:
The pixel array is divided into multiple independent regions, each with its own photoelectric conversion units and charge holding units. This segmentation allows different regions to operate independently, enabling simultaneous full-resolution imaging in one region and high-frame-rate reduced-resolution imaging in another region without interfering with each other
Solution Approach 2:
The patent introduces a spatial dimension by arranging charge holding units in multiple stages (first stage and second stage) vertically or in different layers. This multi-dimensional charge holding structure allows signal charges to be transferred between stages, enabling parallel readout paths that increase frame rate while maintaining full resolution capability
2Productivity
If decimation is used to read pixel signals at high frame rates, then the frame rate for reduced-resolution images can be increased, but the photoelectric conversion units and charge holding units are occupied and cannot be used for full resolution imaging simultaneously
Solution Approach 1:
The imaging device is segmented into multiple independent pixel regions with separate photoelectric conversion units and charge holding units. One region can perform decimation for high frame rate reduced-resolution imaging while another region maintains full-resolution capability, allowing both functions to operate simultaneously without resource conflicts
Solution Approach 2:
Each pixel region is designed with universal functionality that can operate in multiple modes. The charge holding units can selectively transfer signal charges to different readout paths based on the imaging mode required, enabling the same hardware to support both full-resolution and reduced-resolution imaging with different frame rates
3Productivity
If reading of pixel signals is decimated for each row to increase frame rate, then high frame rate reduced-resolution images can be captured, but it is difficult to periodically overlay reading of full resolution pixel signals
Solution Approach 1:
The pixel array is divided into multiple independent regions that can be selectively activated. This allows the system to periodically switch between regions to capture both high-frame-rate reduced-resolution images and full-resolution images, maintaining adaptability for different imaging requirements
Solution Approach 2:
The system dynamically configures the operation mode of different pixel regions based on real-time requirements. Charge holding units can selectively transfer signals to different readout paths, and the control system can dynamically switch between full-resolution and reduced-resolution modes, enabling flexible periodic overlay of different image types
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables high frame rates for reduced-resolution images while maintaining the capability to output full-resolution images, improving image quality and reducing noise and moiré generation, allowing for parallel generation of high and low-resolution images.
Implementation Method 1
signal charges generated by a photoelectric conversion unit such as a photodiode provided in the pixel on which light is incident
Data Source
AI summary
A solid-state imaging device includes a plurality of pixels in which photoelectric conversion units that generate signal charges are arranged in a matrix, a plurality of first charge accumulation circuits that hold the signal charges and output the signal charges as a first pixel signal, a plurality of charge transfer circuits that transfer the signal charges to the first charge accumulation circuit, and a plurality of second charge accumulation circuits that hold signal charges based on the signal charges generated by the photoelectric conversion units and output the signal charges as a second pixel signal in which the number of pixels is reduced to a predetermined number, and the charge transfer circuit transfers the signal charges in the same exposure period to the second charge accumulation circuit when transferring the signal charges of the same exposure to the first charge accumulation circuit.