Solid State Imaging Device Parallel Readout Crosstalk Shielding
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Solution Overview
Problem
Conventional MOS-type solid state imaging devices experience crosstalk issues during concurrent data reading from pixel cells due to capacitive coupling between charge storage portions and output signal lines, which limits data readout rate.
Innovation Solution
Incorporating conductive layers between charge storage portions and output signal lines to suppress capacitive coupling, allowing for parallel data readout from adjacent pixel cells while maintaining the output signal lines in parallel positions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If data is read concurrently from multiple pixel cells on the same column, then data readout rate is improved, but crosstalk occurs due to capacitive coupling between charge storage portions and output signal lines
Solution Approach 1:
A conductive layer is introduced as an intermediary element between the charge storage portion and the output signal line. This conductive layer acts as a shield that intercepts and redirects capacitive coupling effects, preventing direct interference between adjacent pixel cells' signal lines while allowing the parallel readout architecture to function.
Solution Approach 2:
The solution moves from a two-dimensional planar arrangement to a three-dimensional structure by adding a conductive layer in the vertical dimension. This conductive layer is positioned between the charge storage portion and the output signal line, creating a spatial separation that reduces capacitive coupling in the horizontal plane while maintaining the parallel signal line configuration.
2Ease of manufacture
If output signal lines are positioned in parallel for adjacent pixel cells, then device structure is simplified and manufacturing is easier, but capacitive coupling causes signal interference
Solution Approach 1:
The conductive layer serves as a mediator that allows the output signal lines to maintain their parallel configuration for ease of manufacture, while simultaneously blocking the harmful capacitive coupling between adjacent pixel cells' charge storage portions and signal lines.
Solution Approach 2:
The conductive layer segments the electric field distribution between the charge storage portion and the output signal line. By introducing this intermediate conductive structure, the direct capacitive coupling path is divided into multiple smaller coupling paths, each with reduced coupling strength, thereby reducing overall interference.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances data readout rate by minimizing crosstalk and enabling simultaneous data reading from multiple pixel cells on the same column without significant impact on the difference in properties between adjacent pixel cells.
Implementation Method 1
capacitive coupling between charge storage portions and output signal lines
Implementation Method 2
a photodiode operable to perform photo electric conversion
Data Source
AI summary
A solid state imaging device has a pixel region composed of a matrix of pixel cells each including a photodiode and a charge storage portion. First and second output signal lines are in parallel and adjacent to both the charge storage portions of a first pixel cell and a second pixel cells that are adjacent on a same column. A signal voltage of a signal charge in the charge storage portion of the first pixel cell is output to the first output signal line, whereas a signal voltage of a signal charge in the charge storage portion of the second pixel cell is output to the second output signal line. The respective outputs to the first and second output signal lines are processed in parallel. A conductive layer is disposed between the charge storage portion of the first pixel cell and the second output signal line to suppress capacitive coupling.