Solid-State Imaging Device Global Shutter via Charge Storage
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
CMOS image sensors face limitations in achieving a global shutter function, broader dynamic range, and higher frame rates due to inefficiencies in utilizing overflow charges and increased random noise, which also complicates the expansion of effective pixel regions and increases costs.
Innovation Solution
A solid-state imaging device with a pixel structure that includes a photoelectric conversion element, a transfer element, an output node, an output buffer, a storage transistor, and a reset element, allowing for the transfer and storage of charges during and after the integration period, enabling real-time utilization of overflow charges and simultaneous sampling of pixel signals across all pixels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Extent of automation
If a global shutter function is implemented using conventional digital pixel sensors with ADC in each pixel, then simultaneous sampling of all pixels is enabled, but the device complexity increases and effective pixel region expansion becomes difficult
Solution Approach 1:
The pixel structure is segmented into distinct functional regions: photodiode for charge generation, floating diffusion for charge-to-voltage conversion, storage capacitor for signal holding, and separate readout circuitry. This segmentation allows global shutter operation without requiring full ADC integration in each pixel, reducing overall device complexity while maintaining simultaneous sampling capability
Solution Approach 2:
A storage capacitor is introduced as an intermediary element between the photodiode and the readout circuit. This storage capacitor holds the pixel signal during the transfer period, enabling global shutter operation without requiring complex per-pixel ADC circuits, thus reducing device complexity while achieving simultaneous sampling
2Device complexity
If overflow charges from photodiodes are not utilized in real time, then the device structure is simplified, but the dynamic range and frame rate are limited
Solution Approach 1:
The overflow charges that would normally be wasted are converted into useful signal information. The storage capacitor is designed to accept and hold these overflow charges, transforming them into additional dynamic range information that can be read out, thereby improving productivity without significantly increasing device structure complexity
Solution Approach 2:
The storage capacitor serves multiple functions: it holds the primary pixel signal during the transfer period, captures overflow charges to extend dynamic range, and enables flexible readout timing. This multi-functionality allows the device to achieve broader dynamic range and higher frame rates without requiring separate dedicated circuits for each function
3Object-affected harmful factors
If transistor size is enlarged to reduce flicker noise, then random noise is reduced, but the area increases and inversion delay of comparator degrades
Solution Approach 1:
The noise reduction function is extracted from the transistor size enlargement approach and implemented through dedicated low-noise circuit design in the floating diffusion region and storage capacitor interface. This allows noise reduction without the penalty of increased transistor area or degraded comparator inversion delay
Solution Approach 2:
The noise characteristics are improved by optimizing the capacitance values of the floating diffusion and storage capacitor, and by adjusting the readout circuit timing parameters. This approach reduces random noise without requiring enlargement of transistor sizes, thereby avoiding area increase and comparator delay degradation
4Extent of automation
If ADC including comparator and memory part is arranged in each pixel, then global shutter is enabled, but the effective pixel region cannot be expanded to maximum limit and cost increases
Solution Approach 1:
The pixel structure is segmented so that only essential components (photodiode, floating diffusion, storage capacitor) are placed within each pixel area, while the ADC and memory circuits are relocated to shared column-parallel readout circuits. This segmentation enables global shutter operation through the storage capacitor while maximizing the effective pixel region and reducing cost
Solution Approach 2:
The storage capacitor acts as an intermediary that enables global shutter functionality without requiring full ADC integration in each pixel. By holding the pixel signal temporarily, it allows sequential readout through shared ADC circuits, thereby achieving global shutter capability while maximizing pixel area and controlling cost
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enables the realization of a broader dynamic range, higher frame rates, reduced noise, and expanded effective pixel regions while optimizing cost-effectiveness by allowing real-time utilization of overflow charges and efficient signal processing.
Implementation Method 1
a photoelectric conversion element which accumulates a charge generated by photoelectric conversion in an integration period
Data Source
AI summary
A solid-state imaging device, in which a signal holding part can hold a signal with respect to a voltage signal corresponding to an accumulated charge in a photoelectric conversion element of a photodiode PD1 which is transferred to an output node of a floating diffusion FD1 in a transfer period after an integration period and a signal with respect to a voltage signal corresponding to an overflow charge overflowing to the output node of the floating diffusion FD1 from at least the photodiode PD1 in any period among the photoelectric conversion element of the photodiode PD1 and the storage capacity element of the storage capacitor. Due to this, substantially, it becomes possible to realize a broader dynamic range and higher frame rate.