Solid Imaging Device Vertical Signal Line Control
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Solution Overview
Problem
Conventional CMOS image sensors face issues with blooming due to excess charge overflow from photodiodes during high-luminance imaging, and the amplifying transistor operates in an inter-pentapolar region, limiting the contribution of gate capacitance to boosting operations, especially as pixel size decreases.
Innovation Solution
A solid imaging device with a vertical signal line, unit pixels including photodiodes, amplifying transistors, and reset transistors, where the drain power supply has a fixed voltage and is connected to both amplifying and reset transistors, and a control circuit maintains the potential state of the vertical signal line, allowing the amplifying transistor to operate in an inter-tripolar region for enhanced capacitance contribution and preventing blooming.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the amplifying transistor operates in an inter-pentapolar region during booting operation, then the device can function, but only 2/3 of the gate capacitance contributes to boosting operation, reducing efficiency
Solution Approach 1:
The invention changes the operating region parameter of the amplifying transistor from inter-pentapolar region to inter-tripolar region by adjusting the potential of the vertical signal line. This parameter change enables full gate capacitance contribution to boosting operation, resolving the efficiency loss issue where only 2/3 of gate capacitance was utilized.
2Ease of operation
If a Low-state period is introduced to select unit pixels, then pixel selection is enabled, but the drain power supply cannot absorb excess charge during high-luminance imaging, causing blooming
Solution Approach 1:
Instead of lowering the drain power supply voltage to select pixels (conventional method), the invention inverts the approach by maintaining a fixed high voltage on the drain power supply and using vertical signal line potential control for pixel selection. This inversion allows the drain power supply to continuously absorb excess charge and prevent blooming while enabling pixel selection through the alternative mechanism.
Solution Approach 2:
The drain power supply is designed to serve multiple functions simultaneously: it maintains fixed high voltage to enable pixel selection through the amplifying transistor while also continuously absorbing excess charge from photodiodes. This multi-functionality eliminates the need for voltage reduction periods and prevents blooming during high-luminance imaging.
3Manufacturing precision
If pixel size is decreased, then higher resolution is achieved, but the amplifying transistor's gate capacitance contribution to boosting is further limited
Solution Approach 1:
The invention addresses the scaling issue by changing the operating region parameter to inter-tripolar region, which maximizes gate capacitance utilization. This parameter change ensures that even as pixel size decreases, the full gate capacitance of the amplifying transistor contributes to boosting operation, maintaining effectiveness despite reduced dimensions.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration increases the amount of electrons stored in the floating diffusion, enhances the reliability of the boosting operation, and enables microfabrication by utilizing the full gate capacitance for boosting, while preventing blooming and maintaining high reliability and efficiency.
Implementation Method 1
a photodiode which photoelectrically converts and stores incident light
Data Source
AI summary
A solid imaging device includes a vertical signal line, a unit pixel including a photodiode which photoelectrically converts and stores incident light, an amplifying transistor which amplifies an input signal from the photodiode and outputs the amplified signal to the vertical signal line, and a reset transistor which resets a potential of a control electrode of the amplifying transistor, and a control circuit configured to maintain a state of a potential of the vertical signal line while the reset transistor is being driven.